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Andrew Laffely: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Andrew Laffely, Jian Liang, Russell Tessier, Wayne Burleson
    Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 2003, pp:105-108 [Conf]
  2. Lilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas Anand, Andrew Laffely, Jean Luc Philippe
    Targeting Tiled Architectures in Design Exploration. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:172- [Conf]
  3. Andrew Laffely, Wayne Burleson
    Using System On-A-Chip As A Vehicle For VLSI Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:148-149 [Conf]
  4. Vishak Venkatraman, Andrew Laffely, Jinwook Jang, Hempraveen Kukkamalla, Zhi Zhu, Wayne Burleson
    NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods. [Citation Graph (0, 0)][DBLP]
    SLIP, 2004, pp:69-75 [Conf]
  5. Jian Liang, Andrew Laffely, S. Srinivasan, Russell Tessier
    An architecture and compiler for scalable on-chip communication. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:7, pp:711-726 [Journal]

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