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S. Srinivasan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. S. Srinivasan
    A faster recovery from hash table (abstract). [Citation Graph (0, 0)][DBLP]
    ACM Conference on Computer Science, 1986, pp:478- [Conf]
  2. S. Srinivasan, Pradip Dey, Yoichi Hayashi
    A flexible interactive control structure for rule-based systems. [Citation Graph (0, 0)][DBLP]
    ACM Conference on Computer Science, 1988, pp:447-453 [Conf]
  3. Kavish Seth, S. Srinivasan
    VLSI Implementation of 2-D DWT/IDWT Cores using 9/7-tap filter banks based on the Non-expansive Symmetric Extension Scheme. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:435-440 [Conf]
  4. S. Parthasarathy, S. Mehta, S. Srinivasan
    Robust periodicity detection algorithms. [Citation Graph (0, 0)][DBLP]
    CIKM, 2006, pp:874-875 [Conf]
  5. V. Rhymend Uthariaraj, T. C. Rangarajan, S. Srinivasan
    A Security-Centric Comparative Study of PLEASE with Existing GKM Protocols. [Citation Graph (0, 0)][DBLP]
    CNSR, 2007, pp:192-202 [Conf]
  6. J. D. Kranthi Kumar, S. Srinivasan
    A Novel VLSI Architecture to Implement Region Merging Algorithm for Image Segmentation. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:620-623 [Conf]
  7. S. Ramachandran, S. Srinivasan
    Design and FPGA Implementation of a Video Scalar with on-chip reduced memory utilization. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:206-213 [Conf]
  8. S. Ramachandran, S. Srinivasan
    FPGA implementation of a novel, fast motion estimation algorithm for real-time video compression. [Citation Graph (0, 0)][DBLP]
    FPGA, 2001, pp:213-219 [Conf]
  9. S. Srinivasan, P. Thambidurai
    Phrase Based Approach for Document Representation. [Citation Graph (0, 0)][DBLP]
    IC-AI, 2003, pp:683-688 [Conf]
  10. S. Srinivasan
    Fast Partial Search Solution to the 3D SFM Problem. [Citation Graph (0, 0)][DBLP]
    ICCV, 1999, pp:528-535 [Conf]
  11. S. Srinivasan, Malathi Veeraraghavan
    DIVA: A DIstributed & Dynamic VP Management Algorithm. [Citation Graph (0, 0)][DBLP]
    Integrated Network Management, 1997, pp:287-298 [Conf]
  12. S. Ramachandran, S. Srinivasan, R. Chen
    EPLD-based architecture of real time 2D-discrete cosine transform and quantization for image compression. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:375-378 [Conf]
  13. Kumud Prakash Gupta, S. Srinivasan
    Reduced Memory Implementation of Modified Serial Watershed Algorithm Based On Ordered Queue. [Citation Graph (0, 0)][DBLP]
    ITCC, 2003, pp:514-518 [Conf]
  14. A. Durga Kishore, S. Srinivasan
    A Distributed Memory Architecture for Morphological Image Processing. [Citation Graph (0, 0)][DBLP]
    ITCC, 2003, pp:536-540 [Conf]
  15. Anand Rangarajan, S. Srinivasan
    Personalized Trailer Making of MPEG Sequences. [Citation Graph (0, 0)][DBLP]
    Multimedia Technology and Applications, 1996, pp:451-455 [Conf]
  16. R. Srivaths, S. Srinivasan
    Content Based Image Retrieval. [Citation Graph (0, 0)][DBLP]
    Multimedia Technology and Applications, 1996, pp:127-130 [Conf]
  17. S. Srinivasan, Brian L. Dos Santos, Janis L. Gogan, Andrew L. Wright
    Electronic commerce (panel). [Citation Graph (0, 0)][DBLP]
    SIGCPR, 1997, pp:250- [Conf]
  18. Srikar Movva, S. Srinivasan
    A Novel Architecture for Lifting-Based Discrete Wavelet Transform for JPEG2000 Standard suitable for VLSI. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:202-207 [Conf]
  19. D. V. R. Murthy, S. Ramachandran, S. Srinivasan
    Parallel Implementation of 2D-Discrete Cosine Transform Using EPLDs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:336-339 [Conf]
  20. Kavish Seth, P. Rangarajan, S. Srinivasan, V. Kamakoti, V. Bala Kuteshwar
    A Parallel Architectural Implementation Of The New Three-Step Search Algorithm For Block Motion Estimation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:1071-1076 [Conf]
  21. Kavish Seth, S. Srinivasan
    VLSI Implementation of 2-D DWT/IDWT Cores Using 9/7-Tap Filter Banks Based on the Non-Expansive Symmetric Extension Scheme. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:435-440 [Conf]
  22. Kavish Seth, K. N. Viswajith, S. Srinivasan, V. Kamakoti
    Ultra Folded High-Speed Architectures for Reed-Solomon Decoders. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:517-520 [Conf]
  23. S. Sudarsanam, S. Srinivasan
    Searching for protein loops in parallel. [Citation Graph (0, 0)][DBLP]
    Computer Applications in the Biosciences, 1995, v:11, n:6, pp:591-593 [Journal]
  24. S. Srinivasan
    Role of trust in e-business success. [Citation Graph (0, 0)][DBLP]
    Inf. Manag. Comput. Security, 2004, v:12, n:1, pp:66-72 [Journal]
  25. S. Ramachandran, S. Srinivasan
    Design and FPGA implementation of an MPEG based video scalar with reduced on-chip memory utilization. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2005, v:51, n:6-7, pp:435-450 [Journal]
  26. P. Rajesh Kumar, K. Sridharan, S. Srinivasan
    A parallel algorithm, architecture and FPGA realization for landmark determination and map construction in a planar unknown environment. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2006, v:32, n:3, pp:205-221 [Journal]
  27. S. Srinivasan
    Compiler Design for Sets in PASCAL. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 1990, v:25, n:1, pp:23-24 [Journal]
  28. S. Srinivasan
    A Critical Look At Some Ada Features. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 1994, v:29, n:3, pp:18-22 [Journal]
  29. S. Srinivasan, Niraj K. Jha
    Safety and Reliability Driven Task Allocation in Distributed Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1999, v:10, n:3, pp:238-251 [Journal]
  30. Jian Liang, Andrew Laffely, S. Srinivasan, Russell Tessier
    An architecture and compiler for scalable on-chip communication. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:7, pp:711-726 [Journal]
  31. S. Srinivasan, J. Samuelsson, W. B. Kleijn
    Codebook driven short-term predictor parameter estimation for speech enhancement. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Audio, Speech & Language Processing, 2006, v:14, n:1, pp:163-176 [Journal]
  32. S. P. Alampalayam, Anup Kumar, J. H. Graham, S. Srinivasan
    Intruder Identification and Response Framework for Mobile Ad hoc Networks. [Citation Graph (0, 0)][DBLP]
    Computers and Their Applications, 2007, pp:260-265 [Conf]
  33. S. Ramachandran, S. Srinivasan
    A fast, FPGA-based MPEG-2 video encoder with a novel automatic quality control scheme. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:25, n:9-10, pp:449-457 [Journal]

  34. Rapid Abstract Control Model for Signal Processing Implementation. [Citation Graph (, )][DBLP]

  35. An Optimal, Distributed Deadlock Detection and Resolution Algorithm for Generalized Model in Distributed Systems. [Citation Graph (, )][DBLP]

  36. A stabilized mixed formulation for unsteady Brinkman equation based on the method of horizontal lines [Citation Graph (, )][DBLP]

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