The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Sami Khawam: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lindsay
    A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:639-644 [Conf]
  2. Adeoye Olugbon, Sami Khawam, Tughrul Arslan, Ioannis Nousias, Iain Lindsay
    An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:1256-1259 [Conf]
  3. Ying Yi, Mark Milward, Sami Khawam, Ioannis Nousias, Tughrul Arslan
    Automatic synthesis and scheduling of multirate DSP algorithms. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:635-638 [Conf]
  4. Cheng Zhan, Tughrul Arslan, Sami Khawam, Iain Lindsay
    A domain specific reconfigurable Viterbi fabric for system-on-chip applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:916-919 [Conf]
  5. Sami Khawam, Sajid Baloch, Arjun Pai, Imran Ahmed, Nizamettin Aydin, Tughrul Arslan, Fred Westall
    Efficient Implementations of Mobile Video Computations on Domain-Specific Reconfigurable Arrays. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1230-1235 [Conf]
  6. Ying Yi, Ioannis Nousias, Mark Milward, Sami Khawam, Tughrul Arslan, Iain Lindsay
    System-level scheduling on instruction cell based reconfigurable systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:381-386 [Conf]
  7. Sami Khawam, Tughrul Arslan, Fred Westall
    Unidirectional Switch-Boxes for Synthesizable Reconfigurable Arrays. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:293-295 [Conf]
  8. Sami Khawam, Tughrul Arslan, Fred Westall
    Domain-Specific Reconfigurable Array for Distributed Arithmetic. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:1139-1144 [Conf]
  9. Konstantinos Katsoulakis, Tughrul Arslan, Tony Kirkham, Sami Khawam
    A Low-Power Reconfigurable Datapath for Advanced Speech Coding Algorithms. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  10. Sami Khawam, Tughrul Arslan, Fred Westall
    Synthesizable Reconfigurable Array Targeting Distributed Arithmetic for System-on-Chip Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  11. Sami Khawam, Tughrul Arslan, Fred Westall
    Embedded reconfigurable array targeting motion estimation applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:760-763 [Conf]
  12. Cheng Zhan, Tughrul Arslan, Sami Khawam, Iain Lindsay
    Efficient implementation of trace-back unit in a reconfigurable Viterbi decoder fabric. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1048-1050 [Conf]
  13. B. Ahmad, Ahmet T. Erdogan, Sami Khawam
    Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:405-411 [Conf]
  14. Wing On Fung, Tughrul Arslan, Sami Khawam
    Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:200-206 [Conf]
  15. Hassan Artail, Haïdar Safa, Joe Naoum-Sawaya, Bissan Ghaddar, Sami Khawam
    A simple recursive scheme for adjusting the contention window size in IEEE 802.11e wireless ad hoc networks. [Citation Graph (0, 0)][DBLP]
    Computer Communications, 2006, v:29, n:18, pp:3789-3803 [Journal]

  16. H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture. [Citation Graph (, )][DBLP]


  17. A Multi Objective GA based Physical Placement Algorithm for Heterogeneous Dynamically Reconfigurable Arrays. [Citation Graph (, )][DBLP]


  18. A Hybrid Engine for the Placement of Domain-Specific Reconfigurable Arrays. [Citation Graph (, )][DBLP]


  19. A Multi-object GA Based Physical Placement Algorithm for Heterogeneous Dynamicaly Reconfigurable Arrays. [Citation Graph (, )][DBLP]


  20. H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture. [Citation Graph (, )][DBLP]


  21. Extensible software emulator for reconfigurable instruction cell based processors. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002