Journals in DBLP

ACM Trans. Design Autom. Electr. Syst.
2004, volume: 9, number: 4

1. Ali Dasdan
   Experimental analysis of the fastest optimum cycle ratio and mean algorithms. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:4, pp:385-418 [Journal]
   
2. Arijit Ghosh, Tony Givargis
   Cache optimization for embedded processor cores: An analytical approach. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:4, pp:419-440 [Journal]
   
3. Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau
   Coordinated parallelizing compiler optimizations and high-level synthesis. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:4, pp:441-470 [Journal]
   
4. Érika F. Cota, Luigi Carro, Marcelo Lubaszewski
   Reusing an on-chip network for the test of core-based systems. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:4, pp:471-499 [Journal]
   
5. C. V. Krishna, Abhijit Jas, Nur A. Touba
   Achieving high encoding efficiency with partial dynamic LFSR reseeding. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:4, pp:500-516 [Journal]
   
6. William N. N. Hung, Xiaoyu Song, El Mostapha Aboulhamid, Andrew A. Kennings, Alan J. Coppola
   Segmented channel routability via satisfiability. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:4, pp:517-528 [Journal]