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Publications of Author

1. Jeong-Gun Lee, Euiseok Kim, Jeong-A. Lee, Eunok Paek
   Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. [Citation Graph (0, 0)][DBLP]
   Asia-Pacific Computer Systems Architecture Conference, 2004, pp:582-595 [Conf]
   
2. Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee
   Building a Distributed Asynchronous Control Unit through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG. [Citation Graph (0, 0)][DBLP]
   ARVLSI, 2001, pp:2-15 [Conf]
   
3. Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee
   Imprecise data computation for high performance asynchronous processors. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2001, pp:261-266 [Conf]
   
4. Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee
   Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
   ASYNC, 2000, pp:104-113 [Conf]
   
5. Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya
   Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units. [Citation Graph (0, 0)][DBLP]
   DATE, 2003, pp:10276-10281 [Conf]
   
6. Eun-Gu Jung, Jeong-Gun Lee, Sang-Hoon Kwak, Kyoung-Sun Jhang, Jeong-A. Lee, Dong-Soo Har
   High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2005, pp:152-155 [Conf]
   
7. Wook Shin, Jeong-Gun Lee, Hong Kook Kim, Kouichi Sakurai
   Procedural Constraints in the Extended RBAC and the Coloured Petri Net Modeling. [Citation Graph (0, 0)][DBLP]
   IEICE Transactions, 2005, v:88, n:1, pp:327-330 [Journal]
   
8. Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee
   Instruction level redundant number computations for fast data intensive processing in asynchronous processors. [Citation Graph (0, 0)][DBLP]
   Journal of Systems Architecture, 2005, v:51, n:3, pp:151-164 [Journal]
   
9. Jeong-Gun Lee, Jeong-A. Lee, Byeong-Seok Lee, Milos D. Ercegovac
   A Design Method for Heterogeneous Adders. [Citation Graph (0, 0)][DBLP]
   ICESS, 2007, pp:121-132 [Conf]
   
10. Daniel Greenfield, Arnab Banerjee, Jeong-Gun Lee, Simon Moore
    Implications of Rent's Rule for NoC Design and Its Fault-Tolerance. [Citation Graph (0, 0)][DBLP]
    NOCS, 2007, pp:283-294 [Conf]
    
11. Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Son Jhang, Jeong-A. Lee, Dongsoo Har
    Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:46, n:2-3, pp:133-151 [Journal]
    
12. 
    Embedding High-Performance Synchronous Routers to Asynchronous Network on Chip. [Citation Graph (, )][DBLP]
    
    
13. 
    An Asymptotic Performance/Energy Analysis and Optimization of Multi-core Architectures. [Citation Graph (, )][DBLP]