Search the dblp DataBase

Publications of Author

1. Luca Fanucci, Michele Cassiano, Sergio Saponara, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
   ASIP design and synthesis for non linear filtering in image processing. [Citation Graph (0, 0)][DBLP]
   DATE Designers' Forum, 2006, pp:233-238 [Conf]
   
2. Sergio Saponara, Pierangelo Terreni
   Mixed-signal design of a digital input power amplifier for automotive audio applications. [Citation Graph (0, 0)][DBLP]
   DATE Designers' Forum, 2006, pp:212-216 [Conf]
   
3. Sergio Saponara, Michele Cassiano, Stefano Marsi, Riccardo Coen, Luca Fanucci
   Cost-effective VLSI Design of Non Linear Image Processing Filters. [Citation Graph (0, 0)][DBLP]
   DSD, 2005, pp:322-329 [Conf]
   
4. Luca Fanucci, Sergio Saponara, Andrea Cenciotti
   IP Reuse VLSI Architecture for Low Complexity Fast Motion Estimation in Multimedia Applications. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 2000, pp:1417-1424 [Conf]
   
5. Luca Fanucci, Lorenzo Bertini, Sergio Saponara
   Programmable and Low Power VLSI Architecture for Full Search Motion Estimation in Multimedia Communications. [Citation Graph (0, 0)][DBLP]
   IEEE International Conference on Multimedia and Expo (III), 2000, pp:1395-1398 [Conf]
   
6. Sergio Saponara, Luca Fanucci, L. Serafini
   Low-Power FFT/IFFT VLSI Macro Cell for Scalable Broadband VDSL Modem. [Citation Graph (0, 0)][DBLP]
   IWSOC, 2003, pp:161-166 [Conf]
   
7. Sergio Saponara, Luca Fanucci, Pierangelo Terreni
   Context-Aware Algorithmic/Architectural Solutions for Real-time Embedded Video Systems. [Citation Graph (0, 0)][DBLP]
   WISES, 2004, pp:79-90 [Conf]
   
8. Luca Fanucci, Sergio Saponara, Lorenzo Bertini
   A parametric VLSI architecture for video motion estimation. [Citation Graph (0, 0)][DBLP]
   Integration, 2001, v:31, n:1, pp:79-100 [Journal]
   
9. Sergio Saponara, Esa Petri, Marco Tonarelli, Iacopo Del Corona, Luca Fanucci
   FPGA-based networking systems for high data-rate and reliable in-vehicle communications. [Citation Graph (0, 0)][DBLP]
   DATE, 2007, pp:480-485 [Conf]
   
10. Sergio Saponara, Luca Fanucci
    VLSI design investigation for low-cost, low-power FFT/IFFT processing in advanced VDSL transceivers. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:2, pp:133-148 [Journal]
    
11. 
    Mixed-Signal Design Space Exploration of Time-Interleaved A/D Converters for Ultra-Wide Band Applications. [Citation Graph (, )][DBLP]
    
    
12. 
    Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems. [Citation Graph (, )][DBLP]
    
    
13. 
    LIME: A Low-latency and Low-complexity On-chip Mesochronous Link with Integrated Flow Control. [Citation Graph (, )][DBLP]
    
    
14. 
    Hardware/Software FPGA-based Network Emulator for High-speed On-board Communications. [Citation Graph (, )][DBLP]