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William Loh: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Payman Zarkesh-Ha, Ken Doniger, William Loh, Dechang Sun, Rick Stephani, Gordon Priebe
    A Compact Model for Analysis and Design of On-chip Power Network with Decoupling Capacitors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:84-89 [Conf]
  2. Payman Zarkesh-Ha, S. Lakshminarayann, Ken Doniger, William Loh, Peter Wright
    Impact of Interconnect Pattern Density Information on a 90nm Technology ASIC Design Flow. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:405-409 [Conf]
  3. Payman Zarkesh-Ha, Ken Doniger, William Loh, Peter Bendix
    Prediction of interconnect adjacency distribution: derivation, validation, and applications. [Citation Graph (0, 0)][DBLP]
    SLIP, 2004, pp:99-106 [Conf]
  4. Payman Zarkesh-Ha, Jeffrey A. Davis, William Loh, James D. Meindl
    Prediction of interconnect fan-out distribution using Rent's rule. [Citation Graph (0, 0)][DBLP]
    SLIP, 2000, pp:107-112 [Conf]
  5. Payman Zarkesh-Ha, Ken Doniger, William Loh, Peter Wright
    Prediction of interconnect pattern density distribution: derivation, validation, and applications. [Citation Graph (0, 0)][DBLP]
    SLIP, 2003, pp:85-91 [Conf]
  6. Tze Wee Chen, Choshu Ito, William Loh, Robert W. Dutton
    Post-breakdown leakage resistance and its dependence on device area. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:9-11, pp:1612-1616 [Journal]

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