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Publications of Author

1. Massimo Alioto, Gaetano Palumbo, Massimo Poli
   A gate-level strategy to design Carry Select Adders. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:465-468 [Conf]
   
2. Massimo Alioto, Gaetano Palumbo, Massimo Poli
   An Approach to Energy Consumption Modeling in RC Ladder Circuits. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2002, pp:239-246 [Conf]
   
3. Massimo Alioto, Gaetano Palumbo, Massimo Poli
   Energy Consumption in RC Tree Circuits with Exponential Inputs: An Analytical Model. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2005, pp:355-363 [Conf]
   
4. Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli
   Power Modeling of Precharged Address Bus and Application to Multi-bit DPA Attacks to DES Algorithm. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2006, pp:593-602 [Conf]
   
5. Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli
   Techniques to Enhance the Resistance of Precharged Busses to Differential Power Analysis. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2006, pp:624-633 [Conf]
   
6. Massimo Alioto, Gaetano Palumbo, Massimo Poli
   Evaluation of energy consumption in RC ladder circuits driven by a ramp input. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2004, v:12, n:10, pp:1094-1107 [Journal]
   
7. Massimo Alioto, Gaetano Palumbo, Massimo Poli
   Energy Consumption in RC Tree Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2006, v:14, n:5, pp:452-461 [Journal]
   
8. Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli
   Mixed Techniques to Protect Precharged Busses against Differential Power Analysis Attacks. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:861-864 [Conf]
   
9. Massimo Alioto, Gaetano Palumbo, Massimo Poli
   Efficient output transition time modeling in CMOS gates with ramp/exponential inputs. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2006, pp:- [Conf]
   
10. 
    A general model for differential power analysis attacks to static logic circuits. [Citation Graph (, )][DBLP]
    
    
11. 
    Explicit energy evaluation in RLC tree circuits with ramp inputs. [Citation Graph (, )][DBLP]