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Guei-Yuan Lueh :
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Tatiana Shpeisman , Guei-Yuan Lueh , Ali-Reza Adl-Tabatabai Just-In-Time Java? Compilation for the Itanium® Processor. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:249-258 [Conf ] Shih-wei Liao , Zhaohui Du , Gansha Wu , Guei-Yuan Lueh Data and Computation Transformations for Brook Streaming Applications on Multiprocessors. [Citation Graph (0, 0)][DBLP ] CGO, 2006, pp:196-207 [Conf ] Gansha Wu , Xin Zhou , Guei-Yuan Lueh , Jesse Z. Fang , Peng Guo , Jinzhan Peng , Victor Ying XAMM: A High-Performance Automatic Memory Management System with Memory-Constrained Designs. [Citation Graph (0, 0)][DBLP ] HiPEAC, 2005, pp:130-149 [Conf ] Shih-wei Liao , Zhaohui Du , Gansha Wu , Guei-Yuan Lueh A Code Generation Algorithm for Affine Partitioning Framework. [Citation Graph (0, 0)][DBLP ] ICPADS (2), 2005, pp:17-21 [Conf ] Liu Yang , Sun Chan , Guang R. Gao , Roy Ju , Guei-Yuan Lueh , Zhaoqing Zhang Inter-procedural stacked register allocation for itanium® like architecture. [Citation Graph (0, 0)][DBLP ] ICS, 2003, pp:215-225 [Conf ] Ali-Reza Adl-Tabatabai , Thomas R. Gross , Guei-Yuan Lueh , James Reinders Modeling Instruction-Level Parallelism for Software Pipelining. [Citation Graph (0, 0)][DBLP ] Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, 1993, pp:321-330 [Conf ] Guei-Yuan Lueh , Thomas R. Gross , Ali-Reza Adl-Tabatabai Global Register Allocation Based on Graph Fusion. [Citation Graph (0, 0)][DBLP ] LCPC, 1996, pp:246-265 [Conf ] Gilberto Contreras , Margaret Martonosi , Jinzhan Peng , Roy Ju , Guei-Yuan Lueh XTREM: a power simulator for the Intel XScale® core. [Citation Graph (0, 0)][DBLP ] LCTES, 2004, pp:115-125 [Conf ] Ali-Reza Adl-Tabatabai , Thomas R. Gross , Guei-Yuan Lueh Code Reuse in an Optimizing Compiler. [Citation Graph (0, 0)][DBLP ] OOPSLA, 1996, pp:51-68 [Conf ] Mustafa M. Tikir , Jeffrey K. Hollingsworth , Guei-Yuan Lueh Recompilation for debugging support in a JIT-compiler. [Citation Graph (0, 0)][DBLP ] PASTE, 2002, pp:10-17 [Conf ] Shih-wei Liao , Zhaohui Du , Gansha Wu , Guei-Yuan Lueh Parallel Processing of A Raytracer for GPU vs. for CPU. [Citation Graph (0, 0)][DBLP ] PDPTA, 2005, pp:1024-1030 [Conf ] Ali-Reza Adl-Tabatabai , Michal Cierniak , Guei-Yuan Lueh , Vishesh M. Parikh , James M. Stichnoth Fast, Effective Code Generation in a Just-In-Time Java Compiler. [Citation Graph (0, 0)][DBLP ] PLDI, 1998, pp:280-290 [Conf ] Michal Cierniak , Guei-Yuan Lueh , James M. Stichnoth Practicing JUDO: Java under dynamic optimizations. [Citation Graph (0, 0)][DBLP ] PLDI, 2000, pp:13-26 [Conf ] Guei-Yuan Lueh , Thomas R. Gross Call-Cost Directed Register Allocation. [Citation Graph (0, 0)][DBLP ] PLDI, 1997, pp:296-307 [Conf ] James M. Stichnoth , Guei-Yuan Lueh , Michal Cierniak Support for Garbage Collection at Every Instruction in a Java Compiler. [Citation Graph (0, 0)][DBLP ] PLDI, 1999, pp:118-127 [Conf ] Gilberto Contreras , Margaret Martonosi , Jinzhang Peng , Guei-Yuan Lueh , Roy Ju The XTREM power and performance simulator for the Intel XScale core: Design and experiences. [Citation Graph (0, 0)][DBLP ] ACM Trans. Embedded Comput. Syst., 2007, v:6, n:1, pp:- [Journal ] Guei-Yuan Lueh , Thomas R. Gross , Ali-Reza Adl-Tabatabai Fusion-based register allocation. [Citation Graph (0, 0)][DBLP ] ACM Trans. Program. Lang. Syst., 2000, v:22, n:3, pp:431-470 [Journal ] Perry H. Wang , Jamison D. Collins , Gautham N. Chinya , Hong Jiang , Xinmin Tian , Milind Girkar , Nick Y. Yang , Guei-Yuan Lueh , Hong Wang EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system. [Citation Graph (0, 0)][DBLP ] PLDI, 2007, pp:156-166 [Conf ] A comprehensive study of hardware/software approaches to improve TLB performance for java applications on embedded systems. [Citation Graph (, )][DBLP ] Search in 0.047secs, Finished in 0.048secs