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Xiaotong Zhuang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Xiaotong Zhuang, Santosh Pande
    Resolving Register Bank Conflicts for a Network Processor. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:269-0 [Conf]
  2. Xiaotong Zhuang, Santosh Pande, John S. Greenland Jr.
    A Framework for Parallelizing Load/Stores on Embedded Processors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:68-0 [Conf]
  3. Xiaotong Zhuang, Tao Zhang, Santosh Pande
    HIDE: an infrastructure for efficiently protecting information leakage on the address bus. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2004, pp:72-84 [Conf]
  4. Tao Zhang, Xiaotong Zhuang, Santosh Pande, Wenke Lee
    Anomalous path detection with hardware support. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:43-54 [Conf]
  5. Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, Santosh Pande
    Hardware assisted control flow obfuscation for embedded processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:292-302 [Conf]
  6. Tao Zhang, Xiaotong Zhuang, Santosh Pande
    Building Intrusion-Tolerant Secure Software. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:255-266 [Conf]
  7. Tao Zhang, Xiaotong Zhuang, Santosh Pande
    Compiler Optimizations to Reduce Security Overhead. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:346-357 [Conf]
  8. Xiaotong Zhuang, Jian Liu
    WRAPS Scheduling and Its Efficient Implementation on Network Processors. [Citation Graph (0, 0)][DBLP]
    HiPC, 2002, pp:252-263 [Conf]
  9. Xiaotong Zhuang, Santosh Pande
    Compiler Scheduling of Mobile Agents for Minimizing Overheads. [Citation Graph (0, 0)][DBLP]
    ICDCS, 2003, pp:600-0 [Conf]
  10. Xiaotong Zhuang, Hsien-Hsin S. Lee
    A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches. [Citation Graph (0, 0)][DBLP]
    ICPP, 2003, pp:286-293 [Conf]
  11. Xiaotong Zhuang, Vincenzo Liberatore
    A Recursion-Based Broadcast Paradigm in Wormhole Routed Mesh/Torus Networks. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  12. R. Collins, F. Alegre, Xiaotong Zhuang, Santosh Pande
    Compiler assisted dynamic management of registers for network processors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  13. Xiaotong Zhuang, ChokSheak Lau, Santosh Pande
    Storage assignment optimizations through variable coalescence for embedded processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2003, pp:220-231 [Conf]
  14. Xiaotong Zhuang, Santosh Pande
    Power-efficient prefetching via bit-differential offset assignment on embedded processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:67-77 [Conf]
  15. Xiaotong Zhuang, Santosh Pande
    Effective thread management on network processors with compiler analysis. [Citation Graph (0, 0)][DBLP]
    LCTES, 2006, pp:72-82 [Conf]
  16. Xiaotong Zhuang, Tao Zhang, Santosh Pande
    Hardware-managed register allocation for embedded processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:192-201 [Conf]
  17. Xiaotong Zhuang, Tao Zhang, Santosh Pande
    Using Branch Correlation to Identify Infeasible Paths for Anomaly Detection. [Citation Graph (0, 0)][DBLP]
    MICRO, 2006, pp:113-122 [Conf]
  18. Weidong Shi, Xiaotong Zhuang, Indrani Paul, Karsten Schwan
    Efficient Implementation of Packet Scheduling Algorithm on High-Speed Programmable Network Processors. [Citation Graph (0, 0)][DBLP]
    MMNS, 2002, pp:184-197 [Conf]
  19. Xiaotong Zhuang, Santosh Pande
    Balancing register allocation across threads for a multithreaded network processor. [Citation Graph (0, 0)][DBLP]
    PLDI, 2004, pp:289-300 [Conf]
  20. Xiaotong Zhuang, Santosh Pande
    Differential register allocation. [Citation Graph (0, 0)][DBLP]
    PLDI, 2005, pp:168-179 [Conf]
  21. Xiaotong Zhuang, Mauricio J. Serrano, Harold W. Cain, Jong-Deok Choi
    Accurate, efficient, and adaptive calling context profiling. [Citation Graph (0, 0)][DBLP]
    PLDI, 2006, pp:263-271 [Conf]
  22. Xiaotong Zhuang, Hsien-Hsin S. Lee
    Reducing Cache Pollution via Dynamic Data Prefetch Filtering. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:1, pp:18-31 [Journal]
  23. Xiaotong Zhuang, Santosh Pande
    Parallelizing load/stores on dual-bank memory embedded processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:3, pp:613-657 [Journal]
  24. Xiaotong Zhuang, Santosh Pande
    Power-efficient prefetching for embedded processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:1, pp:- [Journal]
  25. Xiaotong Zhuang, Vincenzo Liberatore
    A Recursion-Based Broadcast Paradigm in Wormhole Routed Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:11, pp:1034-1052 [Journal]
  26. Xiaotong Zhuang, Santosh Pande
    A Scalable Priority Queue Architecture for High Speed Network Processing. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 2006, pp:- [Conf]
  27. Xiaotong Zhuang, Santosh Pande
    Allocating architected registers through differential encoding. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2007, v:29, n:2, pp:- [Journal]

  28. Exploiting Parallelism with Dependence-Aware Scheduling. [Citation Graph (, )][DBLP]


  29. Perfdiff: a framework for performance difference analysis in a virtual machine environment. [Citation Graph (, )][DBLP]


  30. Building Approximate Calling Context from Partial Call Traces. [Citation Graph (, )][DBLP]


  31. Automated Tuning in Parallel Sorting on Multi-core Architectures. [Citation Graph (, )][DBLP]


  32. Placement optimization using data context collected during garbage collection. [Citation Graph (, )][DBLP]


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