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Title:
Author:
Santosh Pande: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Xiaotong Zhuang, Santosh Pande
    Resolving Register Bank Conflicts for a Network Processor. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:269-0 [Conf]
  2. Xiaotong Zhuang, Santosh Pande, John S. Greenland Jr.
    A Framework for Parallelizing Load/Stores on Embedded Processors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:68-0 [Conf]
  3. Weidong Shi, Tao Zhang, Santosh Pande
    Static Techniques to Improve Power Efficiency of Branch Predictors. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:385-398 [Conf]
  4. Christian Poellabauer, Tao Zhang, Santosh Pande, Karsten Schwan
    An Efficient Frequency Scaling Approach for Energy-Aware Embedded Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    ARCS, 2005, pp:207-221 [Conf]
  5. Xiaotong Zhuang, Tao Zhang, Santosh Pande
    HIDE: an infrastructure for efficiently protecting information leakage on the address bus. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2004, pp:72-84 [Conf]
  6. Tao Zhang, Santosh Pande, André L. M. dos Santos, Franz Josef Bruecklmayr
    Leakage-proof program partitioning. [Citation Graph (0, 0)][DBLP]
    CASES, 2002, pp:136-145 [Conf]
  7. Tao Zhang, Xiaotong Zhuang, Santosh Pande, Wenke Lee
    Anomalous path detection with hardware support. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:43-54 [Conf]
  8. Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, Santosh Pande
    Hardware assisted control flow obfuscation for embedded processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:292-302 [Conf]
  9. Siddharth Rele, Santosh Pande, Soner Önder, Rajiv Gupta
    Optimizing Static Power Dissipation by Functional Units in Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    CC, 2002, pp:261-275 [Conf]
  10. Lei Wang, Waibhav Tembe, Santosh Pande
    A Framework for Loop Distribution on Limited On-Chip Memory Processors. [Citation Graph (0, 0)][DBLP]
    CC, 2000, pp:141-156 [Conf]
  11. Tao Zhang, Xiaotong Zhuang, Santosh Pande
    Building Intrusion-Tolerant Secure Software. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:255-266 [Conf]
  12. Tao Zhang, Xiaotong Zhuang, Santosh Pande
    Compiler Optimizations to Reduce Security Overhead. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:346-357 [Conf]
  13. Santosh Pande, Tareq Bali
    A Compilation Method for Communication-Efficient Partitioning of DOALL Loops. [Citation Graph (0, 0)][DBLP]
    Compiler Optimizations for Scalable Parallel Systems Languages, 2001, pp:413-444 [Conf]
  14. Kun Zhang, Tao Zhang, Santosh Pande
    Binary translation to improve energy efficiency through post-pass register re-allocation. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2004, pp:74-85 [Conf]
  15. Ram Subramanian, Santosh Pande
    A Data Re-use Based Compiler Optimization for FPGAs. [Citation Graph (0, 0)][DBLP]
    FPL, 2001, pp:648-652 [Conf]
  16. Santosh Pande, Tareq Bali
    A Multi-Phase Partitioner and Scheduler for Distributed Memory Systems. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1996, pp:547-556 [Conf]
  17. Kleanthis Psarris, Santosh Pande
    Classical dependence analysis techniques: sufficiently accurate in practice. [Citation Graph (0, 0)][DBLP]
    HICSS (2), 1995, pp:123-132 [Conf]
  18. Mark Leair, Santosh Pande
    Optimizing Dynamic Dispatches through Type Invariant Region Analysis. [Citation Graph (0, 0)][DBLP]
    HiPC, 2003, pp:459-468 [Conf]
  19. Tao Zhang, Weidong Shi, Santosh Pande
    Static Techniques to Improve Power Efficiency of Branch Predictors. [Citation Graph (0, 0)][DBLP]
    HiPC, 2004, pp:274-285 [Conf]
  20. Dong Zhou, Santosh Pande, Karsten Schwan
    Method Partitioning - Runtime Customization of Pervasive Programs without Design-time Application Knowledge. [Citation Graph (0, 0)][DBLP]
    ICDCS, 2003, pp:610-619 [Conf]
  21. Xiaotong Zhuang, Santosh Pande
    Compiler Scheduling of Mobile Agents for Minimizing Overheads. [Citation Graph (0, 0)][DBLP]
    ICDCS, 2003, pp:600-0 [Conf]
  22. Santosh Pande
    A Compile Time Partitioning Method for DOALL Loops on Distributed Memory Systems. [Citation Graph (0, 0)][DBLP]
    ICPP, Vol. 3, 1996, pp:35-44 [Conf]
  23. Santosh Pande, Dharma P. Agrawal, Jon Mauney
    On Control Flow and Pseudo-Static Dynamic Allocation Strategy. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1990, pp:300-301 [Conf]
  24. Santosh Pande, Kleanthis Psarris
    Compiling Functional Parallelism on a Family of Different Distributed Memory Architectures. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1994, pp:182-186 [Conf]
  25. Kleanthis Psarris, Santosh Pande
    An Empirical Study of the I Test for Exact Data Dependence. [Citation Graph (0, 0)][DBLP]
    ICPP (3), 1994, pp:92-96 [Conf]
  26. Fabrice Rastello, Amit Rao, Santosh Pande
    Optimal Task Scheduling to Minimize Inter-Tile Latencies. [Citation Graph (0, 0)][DBLP]
    ICPP, 1998, pp:172-179 [Conf]
  27. Tankut Akgul, Vincent John Mooney III, Santosh Pande
    A Fast Assembly Level Reverse Execution Method via Dynamic Slicing. [Citation Graph (0, 0)][DBLP]
    ICSE, 2004, pp:522-531 [Conf]
  28. Sukil Kim, Santosh Pande, Dharma P. Agrawal, Jon Mauney
    A Message Segmentation Technique to Minimize Task Completion Time. [Citation Graph (0, 0)][DBLP]
    IPPS, 1991, pp:519-524 [Conf]
  29. Ram Subramanian, Santosh Pande
    Efficient Program Partitioning Based on Compiler Controlled Communication. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1999, pp:4-18 [Conf]
  30. R. Collins, F. Alegre, Xiaotong Zhuang, Santosh Pande
    Compiler assisted dynamic management of registers for network processors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  31. Vipin Jain, Siddharth Rele, Santosh Pande, J. Ramanujam
    Code Restructuring for Improving Real Time Response through Code Speed, Size Trade-offs on Limited Memory Embedded DSPs. [Citation Graph (0, 0)][DBLP]
    LCPC, 1999, pp:459-463 [Conf]
  32. Narasimhan Ramasubramanian, Ram Subramanian, Santosh Pande
    Automatic Analysis of Loops to Exploit Operator Parallelism on Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    LCPC, 1998, pp:305-322 [Conf]
  33. Srivatsan Narasimhan, Santosh Pande
    Compiler Based Scheduling of Java Mobile Agents. [Citation Graph (0, 0)][DBLP]
    LCPC, 2000, pp:372-376 [Conf]
  34. Lei Wang, Santosh Pande
    Data I/O Minimization for Loops on Limited Onchip Memory Processors. [Citation Graph (0, 0)][DBLP]
    LCPC, 1999, pp:472-476 [Conf]
  35. Deepankar Bairagi, Santosh Pande, Dharma P. Agrawal
    A Framework for Efficient Register Allocation through Selective Register Demotion. [Citation Graph (0, 0)][DBLP]
    LCR, 2000, pp:57-69 [Conf]
  36. Sundaram Anantharaman, Santosh Pande
    An Efficient Data Partitioning Method for Limited Memory Embedded Systems. [Citation Graph (0, 0)][DBLP]
    LCTES, 1998, pp:108-222 [Conf]
  37. Deepankar Bairagi, Santosh Pande, Dharma P. Agrawal
    A Framework for Enhancing Code Quality in Limited Register Set Embedded Processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2000, pp:81-95 [Conf]
  38. Xiaotong Zhuang, ChokSheak Lau, Santosh Pande
    Storage assignment optimizations through variable coalescence for embedded processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2003, pp:220-231 [Conf]
  39. Xiaotong Zhuang, Santosh Pande
    Power-efficient prefetching via bit-differential offset assignment on embedded processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:67-77 [Conf]
  40. Xiaotong Zhuang, Santosh Pande
    Effective thread management on network processors with compiler analysis. [Citation Graph (0, 0)][DBLP]
    LCTES, 2006, pp:72-82 [Conf]
  41. Xiaotong Zhuang, Tao Zhang, Santosh Pande
    Hardware-managed register allocation for embedded processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:192-201 [Conf]
  42. Kun Zhang, Santosh Pande
    Efficient application migration under compiler guidance. [Citation Graph (0, 0)][DBLP]
    LCTES, 2005, pp:10-20 [Conf]
  43. Kun Zhang, Santosh Pande
    Minimizing downtime in seamless migrations of mobile applications. [Citation Graph (0, 0)][DBLP]
    LCTES, 2006, pp:12-21 [Conf]
  44. Tao Zhang, Santosh Pande, Antonio Valverde Garcia
    Tamper-resistant whole program partitioning. [Citation Graph (0, 0)][DBLP]
    LCTES, 2003, pp:209-219 [Conf]
  45. Kun Zhang, Tao Zhang, Santosh Pande
    Memory Protection through Dynamic Access Control. [Citation Graph (0, 0)][DBLP]
    MICRO, 2006, pp:123-134 [Conf]
  46. Xiaotong Zhuang, Tao Zhang, Santosh Pande
    Using Branch Correlation to Identify Infeasible Paths for Anomaly Detection. [Citation Graph (0, 0)][DBLP]
    MICRO, 2006, pp:113-122 [Conf]
  47. Santosh Pande, Kleanthis Psarris
    A Compilation Technique for Varying Communication Cost NUMA Architectures. [Citation Graph (0, 0)][DBLP]
    PARLE, 1994, pp:49-60 [Conf]
  48. Amit Rao, Santosh Pande
    Storage Assignment Optimizations to Generate Compact and Efficient Code on Embedded DSPs. [Citation Graph (0, 0)][DBLP]
    PLDI, 1999, pp:128-138 [Conf]
  49. Xiaotong Zhuang, Santosh Pande
    Balancing register allocation across threads for a multithreaded network processor. [Citation Graph (0, 0)][DBLP]
    PLDI, 2004, pp:289-300 [Conf]
  50. Xiaotong Zhuang, Santosh Pande
    Differential register allocation. [Citation Graph (0, 0)][DBLP]
    PLDI, 2005, pp:168-179 [Conf]
  51. Sundaram Anantharaman, Santosh Pande
    Compiler Optimizations for Real Time Execution of Loops on Limited Memory Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1998, pp:154-0 [Conf]
  52. Abhishek Singh, Santosh Pande
    Compiler optimizations for Java aglets in distributed data intensive applications. [Citation Graph (0, 0)][DBLP]
    SAC, 2002, pp:87-92 [Conf]
  53. Kalyan S. Perumalla, Richard M. Fujimoto, Prashant J. Thakare, Santosh Pande, Homa Karimabadi, Yuri Omelchenko, Jonathan Driscoll
    Performance prediction of large-scale parallel discrete event models of physical systems. [Citation Graph (0, 0)][DBLP]
    Winter Simulation Conference, 2005, pp:356-364 [Conf]
  54. Santosh Pande, Dharma P. Agrawal
    Special Issue on Compilation Techniques for Distributed Memory Systems: Guest Editors' Introduction. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:38, n:2, pp:107-113 [Journal]
  55. Santosh Pande, Dharma P. Agrawal, Jon Mauney
    A Threshold Scheduling Strategy for Sisal on Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1994, v:21, n:2, pp:223-236 [Journal]
  56. Santosh Pande, Tareq Bali
    A Computation+Communication Load Balanced Loop Partitioning Method for Distributed Memory Systems. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1999, v:58, n:3, pp:515-545 [Journal]
  57. Santosh Pande, Kleanthis Psarris
    Program Repartitioning on Varying Communication Cost Parallel Architectures. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:33, n:2, pp:205-213 [Journal]
  58. Rajiv Gupta, Santosh Pande, Kleanthis Psarris, Vivek Sarkar
    Compilation techniques for parallel systems. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1999, v:25, n:13-14, pp:1741-1783 [Journal]
  59. Fabrice Rastello, Amit Rao, Santosh Pande
    Optimal task scheduling at run time to exploit intra-tile parallelism. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2003, v:29, n:2, pp:209-239 [Journal]
  60. Waibhav Tembe, Santosh Pande
    Loop Restructuring for Data I/O Minimization on Limited On-Chip Memory Embedded Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:10, pp:1269-1280 [Journal]
  61. Siddharth Rele, Vipin Jain, Santosh Pande, J. Ramanujam
    Compact and efficient code generation through program restructuringon limited memory embedded DSPs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:4, pp:477-494 [Journal]
  62. Xiaotong Zhuang, Santosh Pande
    Parallelizing load/stores on dual-bank memory embedded processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:3, pp:613-657 [Journal]
  63. Xiaotong Zhuang, Santosh Pande
    Power-efficient prefetching for embedded processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:1, pp:- [Journal]
  64. Sekhar Darbha, Santosh Pande
    A Robust Compile Time Method for Scheduling Task Parallelism on Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 1998, v:12, n:4, pp:325-347 [Journal]
  65. Sathyanarayanan Thammanur, Santosh Pande
    A fast, memory-efficient register allocation framework for embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2004, v:26, n:6, pp:938-974 [Journal]
  66. Santosh Pande, Dharma P. Agrawal, Jon Mauney
    A Scalable Scheduling Scheme for Functional Parallelism on Distributed Memory Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1995, v:6, n:4, pp:388-399 [Journal]
  67. Narasimhan Ramasubramanian, Ram Subramanian, Santosh Pande
    Automatic Compilation of Loops to Exploit Operator Parallelism on Configurable Arithmetic Logic Units. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2002, v:13, n:1, pp:45-66 [Journal]
  68. Xiaotong Zhuang, Santosh Pande
    A Scalable Priority Queue Architecture for High Speed Network Processing. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 2006, pp:- [Conf]
  69. Tushar Kumar, Jaswanth Sreeram, Romain Cledat, Santosh Pande
    A profile-driven statistical analysis framework for the design optimization of soft real-time applications. [Citation Graph (0, 0)][DBLP]
    ESEC/SIGSOFT FSE, 2007, pp:529-532 [Conf]
  70. Xiaotong Zhuang, Santosh Pande
    Allocating architected registers through differential encoding. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2007, v:29, n:2, pp:- [Journal]

  71. RSTM : A Relaxed Consistency Software Transactional Memory for Multicores. [Citation Graph (, )][DBLP]


  72. Statistically Analyzing Execution Variance for Soft Real-Time Applications. [Citation Graph (, )][DBLP]


  73. Input-driven dynamic execution prediction of streaming applications. [Citation Graph (, )][DBLP]


  74. A profile-driven statistical analysis framework for the design optimization of soft real-time applications. [Citation Graph (, )][DBLP]


  75. Run-time issues in program partitioning on distributed memory systems. [Citation Graph (, )][DBLP]


  76. Using Ellipsoidal Domains to Analyze Control Systems Software [Citation Graph (, )][DBLP]


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