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Publications of Author

1. Huan-Chih Tsai, Kwang-Ting Cheng, Vishwani D. Agrawal
   A testability metric for path delay faults and its application. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2000, pp:593-598 [Conf]
   
2. Huan-Chih Tsai, Kwang-Ting Cheng, Sudipta Bhawmik
   Improving the Test Quality for Scan-Based BIST Using a General Test Application Scheme. [Citation Graph (0, 0)][DBLP]
   DAC, 1999, pp:748-753 [Conf]
   
3. Huan-Chih Tsai, Kwang-Ting Cheng, Chih-Jen Lin, Sudipta Bhawmik
   A Hybrid Algorithm for Test Point Selection for Scan-Based BIST. [Citation Graph (0, 0)][DBLP]
   DAC, 1997, pp:478-483 [Conf]
   
4. Chung-Yang Huang, Bwolen Yang, Huan-Chih Tsai, Kwang-Ting Cheng
   Static property checking using ATPG vs. BDD techniques. [Citation Graph (0, 0)][DBLP]
   ITC, 2000, pp:309-316 [Conf]
   
5. Huan-Chih Tsai, Sudipta Bhawmik, Kwang-Ting Cheng
   An almost full-scan BIST solution-higher fault coverage and shorter test application time. [Citation Graph (0, 0)][DBLP]
   ITC, 1998, pp:1065-0 [Conf]
   
6. Huan-Chih Tsai, Kwang-Ting Cheng, Sudipta Bhawmik
   On improving test quality of scan-based BIST. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:8, pp:928-938 [Journal]
   
7. Huan-Chih Tsai, Kwang-Ting Cheng, Chih-Jen Lin, Sudipta Bhawmik
   Efficient test-point selection for scan-based BIST. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 1998, v:6, n:4, pp:667-676 [Journal]