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Publications of Author

1. Federico Angiolini, Paolo Meloni, Salvatore Carta, Luca Benini, Luigi Raffo
   Contrasting a NoC and a traditional interconnect fabric with layout awareness. [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:124-129 [Conf]
   
2. Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
   Designing application-specific networks on chips with floorplan information. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2006, pp:355-362 [Conf]
   
3. Federico Angiolini, Paolo Meloni, Luca Benini, Salvatore Carta, Luigi Raffo
   Networks on Chips: A Synthesis Perspective. [Citation Graph (0, 0)][DBLP]
   PARCO, 2005, pp:745-752 [Conf]
   
4. Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
   Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips. [Citation Graph (0, 0)][DBLP]
   VLSI-SoC, 2006, pp:158-163 [Conf]
   
5. Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini
   NoC Design and Implementation in 65nm Technology. [Citation Graph (0, 0)][DBLP]
   NOCS, 2007, pp:273-282 [Conf]
   
6. Srinivasan Murali, David Atienza, Paolo Meloni, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
   Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2007, v:15, n:8, pp:869-880 [Journal]
   
7. 
   On the impact of serialization on the cache performances in Network-on-Chip based MPSoCs. [Citation Graph (, )][DBLP]
   
   
8. 
   Exploiting FPGAs for technology-aware system-level evaluation of multi-core architectures. [Citation Graph (, )][DBLP]