|
Search the dblp DataBase
Samit Chaudhuri:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Samit Chaudhuri, Robert A. Walker
Bounding Algorithms for Design Space Exploration. [Citation Graph (0, 0)][DBLP] Great Lakes Symposium on VLSI, 1999, pp:234-235 [Conf]
- Samit Chaudhuri, Michael Quayle
Synthesis using sequential functional modules (SFMs). [Citation Graph (0, 0)][DBLP] ICCAD, 1996, pp:436-441 [Conf]
- Samit Chaudhuri, Robert A. Walker, John Mitchell
The Structure of Assignment, Precedence, and Resource Constraints in the ILP Approach to the Scheduling Problem. [Citation Graph (0, 0)][DBLP] ICCD, 1993, pp:25-29 [Conf]
- Terry Tao Ye, Samit Chaudhuri, F. Huang, Hamid Savoj, Giovanni De Micheli
Physical synthesis for ASIC datapath circuits. [Citation Graph (0, 0)][DBLP] ISCAS (3), 2002, pp:365-368 [Conf]
- Samit Chaudhuri, Stephen A. Blythe, Robert A. Walker
An exact methodology for scheduling in a 3D design space. [Citation Graph (0, 0)][DBLP] ISSS, 1995, pp:78-83 [Conf]
- David Berthelot, Samit Chaudhuri, Hamid Savoj
An Efficient Linear Time Algorithm for Scan Chain Optimization and Repartitioning. [Citation Graph (0, 0)][DBLP] ITC, 2002, pp:781-787 [Conf]
- Samit Chaudhuri, Robert A. Walker
ILP-Based Scheduling with Time and Resource Constraints in High Level Synthesis. [Citation Graph (0, 0)][DBLP] VLSI Design, 1994, pp:17-20 [Conf]
- Robert A. Walker, Samit Chaudhuri
Introduction to the Scheduling Problem. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 1995, v:12, n:2, pp:60-69 [Journal]
- Samit Chaudhuri, Robert A. Walker, J. E. Mitchell
Analyzing and exploiting the structure of the constraints in the ILP approach to the scheduling problem. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1994, v:2, n:4, pp:456-471 [Journal]
- Samit Chaudhuri, S. A. Blthye, Robert A. Walker
A solution methodology for exact design space exploration in a three-dimensional design space. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1997, v:5, n:1, pp:69-81 [Journal]
- Samit Chaudhuri, Robert A. Walker
Computing lower bounds on functional units before scheduling. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:2, pp:273-279 [Journal]
Search in 0.002secs, Finished in 0.002secs
|