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Giorgos Dimitrakopoulos: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos
    An Energy-Delay Efficient Subword Permutation Unit. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:245-252 [Conf]
  2. Giorgos Dimitrakopoulos, Haridimos T. Vergos, Dimitris Nikolos, Costas Efstathiou
    A Family of Parallel-Pre.x Modulo 2n - 1 Adders. [Citation Graph (0, 0)][DBLP]
    ASAP, 2003, pp:326-336 [Conf]
  3. Giorgos Dimitrakopoulos, Dimitris Nikolos, Dimitris Bakalis
    Bit-Serial Test Pattern Generation by an Accumulator Behaving as a Non-Linear Feedback Shift Register. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:152-157 [Conf]
  4. Giorgos Dimitrakopoulos, Xrysovalantis Kavousianos, Dimitris Nikolos
    Virtual-scan: a novel approach for software-based self-testing of microprocessors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:237-240 [Conf]
  5. Giorgos Dimitrakopoulos, Haridimos T. Vergos, Dimitris Nikolos, Costas Efstathiou
    A systematic methodology for designing area-time efficient parallel-prefix modulo 2/sup n/ - 1 adders. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:225-228 [Conf]
  6. Giorgos Dimitrakopoulos, Dimitris Nikolos
    Closed-Form Bounds for Interconnect-Aware Minimum-Delay Gate Sizing. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:308-317 [Conf]
  7. Giorgos Dimitrakopoulos, P. Kolovos, P. Kalogerakis, Dimitris Nikolos
    Design of High-Speed Low-Power Parallel-Prefix VLSI Adders. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:248-257 [Conf]
  8. Giorgos Dimitrakopoulos, Dimitris Nikolos
    High-Speed Parallel-Prefix VLSI Ling Adders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:2, pp:225-231 [Journal]
  9. Costas Efstathiou, Haridimos T. Vergos, Giorgos Dimitrakopoulos, Dimitris Nikolos
    Efficient Diminished-1 Modulo 2^n+1 Multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:4, pp:491-496 [Journal]
  10. Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos
    Fast bit permutation unit for media enhanced microprocessors. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  11. Giorgos Dimitrakopoulos, Christos Mavrokefalidis, K. Galanopoulos, Dimitris Nikolos
    Sorter Based Permutation Units for Media-Enhanced Microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:6, pp:711-715 [Journal]

  12. Backlog-Aware Crossbar Schedulers: A New Algorithm and its Efficient Hardware Implementation. [Citation Graph (, )][DBLP]


  13. Fast arbiters for on-chip network switches. [Citation Graph (, )][DBLP]


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