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Publications of Author

1. Prasenjit Basu, Sayantan Das, Pallab Dasgupta, Partha Pratim Chakrabarti
   Discovering the input assumptions in specification refinement coverage. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2006, pp:13-18 [Conf]
   
2. Prasenjit Basu, Sayantan Das, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
   Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent? [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:668-669 [Conf]
   
3. Sayantan Das, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti
   What lies between design intent coverage and model checking? [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:1217-1222 [Conf]
   
4. Sayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
   Formal verification coverage: computing the coverage gap between temporal specifications. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2004, pp:198-203 [Conf]
   
5. Suchismita Roy, Sayantan Das, Prasenjit Basu, Pallab Dasgupta, Partha Pratim Chakrabarti
   SAT based solutions for consistency problems in formal property specifications for open systems. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2005, pp:885-888 [Conf]
   
6. Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti
   Syntactic Transformation of Assume-Guarantee Assertions: From Sub-Modules to Modules. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2005, pp:213-218 [Conf]
   
7. Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan
   Property Refinement Techniques for Enhancing Coverage of Formal Property Verification. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2004, pp:109-114 [Conf]
   
8. Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
   Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2005, pp:201-206 [Conf]
   
9. Prasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
   Design-Intent Coverage - A New Paradigm for Formal Property Verification. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:10, pp:1922-1934 [Journal]