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Journals in DBLP

SIGARCH Computer Architecture News
2005, volume: 33, number: 1

  1. David M. Chess
    Security in autonomic computing. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:2-5 [Journal]
  2. Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, Mrinmoy Ghosh
    Towards the issues in architectural support for protection of software execution. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:6-15 [Journal]
  3. John Patrick McGregor, Ruby B. Lee
    Protecting cryptographic keys and computations via virtual secure coprocessing. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:16-26 [Journal]
  4. Brian Rogers, Yan Solihin, Milos Prvulovic
    Memory predecryption: hiding the latency overhead of memory encryption. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:27-33 [Journal]
  5. David A. Holland, Ada T. Lim, Margo I. Seltzer
    An architecture a day keeps the hacker away. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:34-41 [Journal]
  6. Stelios Sidiroglou, Michael E. Locasto, Angelos D. Keromytis
    Hardware support for self-healing software services. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:42-47 [Journal]
  7. Jedidiah R. Crandall, Frederic T. Chong
    A security assessment of the minos architecture. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:48-57 [Journal]
  8. Matthew Burnside, Angelos D. Keromytis
    The case for crypto protocol awareness inside the OS kernel. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:58-64 [Journal]
  9. Marc L. Corliss, E. Christopher Lewis, Amir Roth
    Using DISE to protect return addresses from attack. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:65-72 [Journal]
  10. Dong Ye, David R. Kaeli
    A reliable return address stack: microarchitectural features to defeat stack smashing. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:73-80 [Journal]
  11. Koji Inoue
    Energy-security tradeoff in a secure cache architecture against buffer overflow attacks. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:81-89 [Journal]
  12. Derek Uluski, Micha Moffie, David R. Kaeli
    Characterizing antivirus workload execution. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:90-98 [Journal]
  13. Monther Aldwairi, Thomas M. Conte, Paul D. Franzon
    Configurable string matching hardware for speeding up intrusion detection. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:99-107 [Journal]
  14. Milena Milenkovic, Aleksandar Milenkovic, Emil Jovanov
    Using instruction block signatures to counter code injection attacks. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:108-117 [Journal]
  15. Youtao Zhang, Jun Yang, Yongjing Lin, Lan Gao
    Architectural support for protecting user privacy on trusted processors. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:118-123 [Journal]
  16. Masaaki Shirase, Yasushi Hibino
    An architecture for elliptic curve cryptograph computation. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:124-133 [Journal]
  17. Taeho Kgil, Laura Falk, Trevor N. Mudge
    ChipLock: support for secure microarchitectures. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:134-143 [Journal]
  18. Magnus Ekman, Fredrik Warg, Jim Nilsson
    An in-depth look at computer performance growth. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:144-147 [Journal]
  19. N. Venkateswaran, S. Balaji, V. Sridhar
    Fault tolerant bus architecture for deep submicron based processors. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:148-155 [Journal]
  20. Mark Thorson
    Internet nuggets. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:1, pp:156-160 [Journal]
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