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Publications of Author

1. Mark C. Johnson, Dinesh Somasekhar, Kaushik Roy
   Leakage Control with Efficient Use of Transistor Stacks in Single Threshold CMOS. [Citation Graph (0, 0)][DBLP]
   DAC, 1999, pp:442-445 [Conf]
   
2. Mark C. Johnson, Kaushik Roy
   Optimal Selection of Supply Voltages and Level Conversions During Data Path Scheduling Under Resource Constraints. [Citation Graph (0, 0)][DBLP]
   ICCD, 1996, pp:72-77 [Conf]
   
3. Dongku Kang, Mark C. Johnson, Kaushik Roy
   Multiple-Vdd Scheduling/Allocation for Partitioned Floorplan. [Citation Graph (0, 0)][DBLP]
   ICCD, 2003, pp:412-418 [Conf]
   
4. Dongku Kang, Mark C. Johnson, Kaushik Roy
   Simultaneous Multiple-Vdd Scheduling and Allocation for Partitioned Floorplan. [Citation Graph (0, 0)][DBLP]
   ISQED, 2004, pp:98-103 [Conf]
   
5. Mark C. Johnson
   igital Design Education Infrastructure Using Multiple EDA Tool Vendors and Multiple Modes of Tool Access. [Citation Graph (0, 0)][DBLP]
   MSE, 2001, pp:81-82 [Conf]
   
6. Mark C. Johnson, Dinesh Somasekhar, Kaushik Roy
   Models and algorithms for bounds on leakage in CMOS circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:6, pp:714-725 [Journal]
   
7. Mark C. Johnson, Kaushik Roy
   Datapath scheduling with multiple supply voltages and level converters. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 1997, v:2, n:3, pp:227-248 [Journal]
   
8. Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De
   Design and optimization of dual-threshold circuits for low-voltage low-power applications. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 1999, v:7, n:1, pp:16-24 [Journal]
   
9. Mark C. Johnson, Dinesh Somasekhar, Lih-Yih Chiou, Kaushik Roy
   Leakage control with efficient use of transistor stacks in single threshold CMOS. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:1, pp:1-5 [Journal]