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Song Chen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu
    A buffer planning algorithm with congestion optimization. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:615-620 [Conf]
  2. Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu
    Buffer allocation algorithm with consideration of routing congestion. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:621-623 [Conf]
  3. Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu
    Dynamic global buffer planning optimization based on detail block locating and congestion analysis. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:806-811 [Conf]
  4. Hongjie Bai, Sheqin Dong, Xianlong Hong, Song Chen
    A New Buffer Planning Algorithm Based on Room Resizing. [Citation Graph (0, 0)][DBLP]
    EUC, 2005, pp:291-299 [Conf]
  5. Song Chen, Adam Postula, Lech Józwiak
    Synthesis of XOR Storage Schemes with Different Cost for Minimization of Memory Contention. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1170-1177 [Conf]
  6. Adam Postula, Song Chen, Lech Józwiak, David Abramson
    Automated Synthesis of Interleaved Memory Systems for Custom Computing Machine. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1998, pp:10115-10122 [Conf]
  7. Song Chen, Shan Wang, Ming-Tian Zhou
    Mobile Middleware Based on Distributed Object. [Citation Graph (0, 0)][DBLP]
    GCC (1), 2003, pp:833-838 [Conf]
  8. Song Chen, Mary Mehrnoosh Eshaghian, Ying-Chieh Wu
    Mapping Arbitrary Non-Uniform Task Graphs onto Arbitrary Non-Uniform System Graphs. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1995, pp:191-195 [Conf]
  9. Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Chung-Kuan Cheng
    VLSI block placement with alignment constraints based on corner block list. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:6222-6225 [Conf]
  10. Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu
    Evaluating a bounded slice-line grid assignment in O(nlogn) time. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2003, pp:708-711 [Conf]
  11. Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Chung-Kuan Cheng
    Performance constrained floorplanning based on partial clustering [IC layout]. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1863-1866 [Conf]
  12. Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Song Chen, Chung-Kuan Cheng, Jun Gu
    Arbitrary convex and concave rectilinear block packing based on corner block list. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:493-496 [Conf]
  13. Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu
    An integrated floorplanning with an efficient buffer planning algorithm. [Citation Graph (0, 0)][DBLP]
    ISPD, 2003, pp:136-142 [Conf]
  14. Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Chung-Kuan Cheng
    Floorplanning with Consideration of White Space Resource Distribution for Repeater Planning. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:628-633 [Conf]
  15. Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Chung-Kuan Cheng
    Buffer Planning Algorithm Based on Partial Clustered Floorplanning. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:213-219 [Conf]
  16. Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Chung-Kuan Cheng, Jun Gu
    Fast Evaluation of Bounded Slice-Line Grid. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2004, v:19, n:6, pp:973-980 [Journal]
  17. Song Chen, Mary Mehrnoosh Eshaghian, Richard F. Freund, J. L. Potter, Ying-Chieh Wu
    Evaluation of Two Programming Paradigms for Heterogeneous Computing. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1995, v:31, n:1, pp:41-55 [Journal]
  18. Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Chung-Kuan Cheng, Jun Gu
    Buffer planning as an Integral part of floorplanning with consideration of routing congestion. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:4, pp:609-621 [Journal]
  19. Hongjie Bai, Sheqin Dong, Xianlong Hong, Song Chen
    Buffer planning based on block exchanging. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  20. Song Chen, Takeshi Yoshimura
    A stable fixed-outline floorplanning method. [Citation Graph (0, 0)][DBLP]
    ISPD, 2007, pp:119-126 [Conf]
  21. Chuanfu Chen, Qiong Tang, Yuan Yu, Zhiqiang Wu, Xuan Huang, Song Chen, Haiying Hua, Conjing Ran, Mojun Li
    An Assessment of the Currency of Free Science Information on the Web. [Citation Graph (0, 0)][DBLP]
    WISE Workshops, 2007, pp:493-504 [Conf]
  22. Song Chen, A. Postula
    Synthesis of custom interleaved memory systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:1, pp:74-83 [Journal]

  23. COLLANE: An Experiment in Computer-Mediated Tacit Collaboration. [Citation Graph (, )][DBLP]


  24. Voltage-island driven floorplanning considering level-shifter positions. [Citation Graph (, )][DBLP]


  25. A revisit to voltage partitioning problem. [Citation Graph (, )][DBLP]


  26. An Intensity and Size Invariant Real Time Face Recognition Approach. [Citation Graph (, )][DBLP]


  27. A generalized V-shaped multilevel method for large scale floorplanning. [Citation Graph (, )][DBLP]


  28. UAlbany's ILQUA at TREC 2007. [Citation Graph (, )][DBLP]


  29. On the Number of 3-D IC Floorplan Configurations and a Solution Perturbation Method with Good Convergence. [Citation Graph (, )][DBLP]


  30. VisionSynaptics: a system convert hand-writing and image symbol into computer symbol. [Citation Graph (, )][DBLP]


  31. A fast recursive mapping algorithm. [Citation Graph (, )][DBLP]


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