The SCEAS System
Navigation Menu

Search the dblp DataBase


Uwe Sparmann: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Uwe Sparmann, H. Mueller, Sudhakar M. Reddy
    Minimal Delay Test Sets for Unate Gate Networks. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1996, pp:155-0 [Conf]
  2. Bernd Becker, Uwe Sparmann
    Regular Structures and Testing: RCC-Adders. [Citation Graph (0, 0)][DBLP]
    AWOC, 1988, pp:288-300 [Conf]
  3. Uwe Sparmann, D. Luxenburger, Kwang-Ting Cheng, Sudhakar M. Reddy
    Fast Identification of Robust Dependent Path Delay Faults. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:119-125 [Conf]
  4. Uwe Sparmann, Sudhakar M. Reddy
    On the Effectiveness of Residue Code Checking for Parallel Two's Complement Multipliers. [Citation Graph (0, 0)][DBLP]
    FTCS, 1994, pp:219-228 [Conf]
  5. Thomas Burch, J. Hartmann, Günter Hotz, M. Krallmann, U. Nikolaus, Sudhakar M. Reddy, Uwe Sparmann
    A Hierarchical Environment for Interactive Test Engineering. [Citation Graph (0, 0)][DBLP]
    ITC, 1994, pp:461-470 [Conf]
  6. Harry Hengster, Uwe Sparmann, Bernd Becker, Sudhakar M. Reddy
    Local Transformations and Robust Dependent Path Delay. [Citation Graph (0, 0)][DBLP]
    ITC, 1996, pp:347-356 [Conf]
  7. Paul Molitor, Uwe Sparmann, Dorothea Wagner
    Two-Layer Wiring with Pin Preassignments is Easier if the Power Supply Nets are Already Generated. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:149-154 [Conf]
  8. Uwe Sparmann, Lars Köller
    Improving Path Delay Fault Testability by Path Removal. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:200-209 [Conf]
  9. Prasanti Uppaluri, Uwe Sparmann, Irith Pomeranz
    On minimizing the number of test points needed to achieve complete robust path delay fault testability. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:288-295 [Conf]
  10. Uwe Sparmann
    Design and Test of a Pattern Matching Circuit. [Citation Graph (0, 0)][DBLP]
    Elektronische Informationsverarbeitung und Kybernetik, 1988, v:24, n:7/8, pp:329-338 [Journal]
  11. Bernd Becker, Uwe Sparmann
    A uniform test approach for RCC-adders. [Citation Graph (0, 0)][DBLP]
    Fundam. Inform., 1991, v:14, n:2, pp:185-219 [Journal]
  12. Bernd Becker, Uwe Sparmann
    Computations over Finite Monoids and their Test Complexity. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1991, v:84, n:2, pp:225-250 [Journal]
  13. Uwe Sparmann, Sudhakar M. Reddy
    On the effectiveness of residue code checking for parallel two's complement multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:2, pp:227-239 [Journal]
  14. Uwe Sparmann, H. Mueller, Sudhakar M. Reddy
    Universal delay test sets for logic networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:2, pp:156-166 [Journal]

  15. A graphical system for hierarchical specifications and checkups of VLSI circuits. [Citation Graph (, )][DBLP]

Search in 0.002secs, Finished in 0.003secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002