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Daniel Geist: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sharon Barner, Daniel Geist, Anna Gringauze
    Symbolic Localization Reduction with Reconstruction Layering and Backtracking. [Citation Graph (0, 0)][DBLP]
    CAV, 2002, pp:65-77 [Conf]
  2. Ilan Beer, Shoham Ben-David, Cindy Eisner, Daniel Geist, Leonid Gluhovsky, Tamir Heyman, Avner Landver, P. Paanah, Yoav Rodeh, G. Ronin, Yaron Wolfsthal
    RuleBase: Model Checking at IBM. [Citation Graph (0, 0)][DBLP]
    CAV, 1997, pp:480-483 [Conf]
  3. Ilan Beer, Shoham Ben-David, Daniel Geist, Raanan Gewirtzman, Michael Yoeli
    Methodology and System for Practical Formal Verification of Reactive Hardware. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:182-193 [Conf]
  4. Daniel Geist, Ilan Beer
    Efficient Model Checking by Automated Ordering of Transition Relation Partitions. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:299-310 [Conf]
  5. Tamir Heyman, Daniel Geist, Orna Grumberg, Assaf Schuster
    Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits. [Citation Graph (0, 0)][DBLP]
    CAV, 2000, pp:20-35 [Conf]
  6. Daniel Geist
    The PSL/Sugar Specification Language A Language for all Seasons. [Citation Graph (0, 0)][DBLP]
    CHARME, 2003, pp:3- [Conf]
  7. Sagi Katz, Orna Grumberg, Daniel Geist
    "Have I written enough Properties?" - A Method of Comparison between Specification and Implementation. [Citation Graph (0, 0)][DBLP]
    CHARME, 1999, pp:280-297 [Conf]
  8. Mike Benjamin, Daniel Geist, Alan Hartman, Gérard Mas, Ralph Smeets, Yaron Wolfsthal
    A Study in Coverage-Driven Test Generation. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:970-975 [Conf]
  9. Julia Dushina, Mike Benjamin, Daniel Geist
    Semi-Formal Test Generation with Genevieve. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:617-622 [Conf]
  10. Daniel Geist, Giora Biran, Tamarah Arons, Michael Slavkin, Yvgeny Nustov, Monica Farkas, Karen Holtz, Andy Long, Dave King, Steve Barret
    A Methodology for the Verification of a ``System on Chip''. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:574-579 [Conf]
  11. Daniel Geist, Monica Farkas, Avner Landver, Yossi Lichtenstein, Shmuel Ur, Yaron Wolfsthal
    Coverage-Directed Test Generation Using Symbolic Techniques. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1996, pp:143-158 [Conf]
  12. Anat Dahan, Daniel Geist, Leonid Gluhovsky, Dmitry Pidan, Gil Shapir, Yaron Wolfsthal, Lyes Benalycherif, Romain Kamdem, Younes Lahbib
    Combining System Level Modeling with Assertion Based Verification. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:310-315 [Conf]
  13. Julia Dushina, Mike Benjamin, Daniel Geist
    Semi-Formal Test Generation for a Block of Industrial DSP. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:131-137 [Conf]
  14. Daniel Geist, Michael W. Vannier
    PC-based 3-D reconstruction of medical images. [Citation Graph (0, 0)][DBLP]
    Computers & Graphics, 1989, v:13, n:2, pp:135-143 [Journal]
  15. Daniel Geist, Ervin Y. Rodin
    Adjacency of the 0-1 knapsack problem. [Citation Graph (0, 0)][DBLP]
    Computers & OR, 1992, v:19, n:8, pp:797-800 [Journal]
  16. Baruch Schieber, Daniel Geist, Ayal Zaks
    Computing the minimum DNF representation of Boolean functions defined by intervals. [Citation Graph (0, 0)][DBLP]
    Discrete Applied Mathematics, 2005, v:149, n:1-3, pp:154-173 [Journal]
  17. Daniel Geist, Mark Ginzburg, Yoad Lustig, Ishai Rabinovitz, Ohad Shacham, Rachel Tzoref
    Supporting SAT based BMC on Finite Path Models. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2006, v:144, n:1, pp:67-77 [Journal]
  18. Yael Abarbanel-Vinov, Neta Aizenbud-Reshef, Ilan Beer, Cindy Eisner, Daniel Geist, Tamir Heyman, Iris Reuveni, Eran Rippel, Irit Shitsevalov, Yaron Wolfsthal, Tali Yatzkar-Haham
    On the Effective Deployment of Functional Formal Verification. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2001, v:19, n:1, pp:35-44 [Journal]
  19. Shoham Ben-David, Cindy Eisner, Daniel Geist, Yaron Wolfsthal
    Model Checking at IBM. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2003, v:22, n:2, pp:101-108 [Journal]
  20. Tamir Heyman, Daniel Geist, Orna Grumberg, Assaf Schuster
    A Scalable Parallel Algorithm for Reachability Analysis of Very Large Circuits. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2002, v:21, n:3, pp:317-338 [Journal]
  21. Ashok K. Chandra, Vijay S. Iyengar, D. Jameson, R. V. Jawalekar, Indira Nair, Barry K. Rosen, Michael P. Mullen, J. Yoon, R. Armoni, Daniel Geist, Yaron Wolfsthal
    AVPGEN-A test generator for architecture verification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1995, v:3, n:2, pp:188-200 [Journal]

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