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Jue-Hsien Chern: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Shekhar Y. Borkar, Robert W. Brodersen, Jue-Hsien Chern, Eric Naviasky, D. Saias, Charles Sodini
    Tomorrow's analog: just dead or just different? [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:709-710 [Conf]
  2. Mi-Chang Chang, Jue-Hsien Chern, Ping Yang
    An accurate grid local truncation error for device simulation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:275-282 [Conf]
  3. Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern
    Transient Three-Dimensional Mixed-Level Circuit and Device Simulation: Algorithms and Applications. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:112-115 [Conf]
  4. Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern, Richard Burch, Lawrence A. Arledge Jr., Paul F. Cox
    A Parallel Block-Diagonal Preconditioned Conjugate-Gradient Solution Algorithm for Circuit and Device Simulations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:446-449 [Conf]
  5. Mi-Chang Chang, Jue-Hsien Chern, Ping Yang
    Efficient and Robust Path Tracing Algorithm for DC Convergence Problem. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1635-1638 [Conf]
  6. Jue-Hsien Chern
    Challenges of analog/mixed-signal SoC design and verification. [Citation Graph (0, 0)][DBLP]
    ISPD, 2005, pp:102- [Conf]
  7. Jue-Hsien Chern, John T. Maeda, Lawrence A. Arledge Jr., Ping Yang
    SIERRA: a 3-D device simulator for reliability modeling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:516-527 [Journal]
  8. Kartikeya Mayaram, Jue-Hsien Chern, Ping Yang
    Algorithms for transient three-dimensional mixed-level circuit and device simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:11, pp:1726-1733 [Journal]
  9. K. C.-K. Weng, Ping Yang, Jue-Hsien Chern
    A Predictor/CAD Model for Buried-Channel MOS Transistors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:1, pp:4-16 [Journal]

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