The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Elisardo Antelo: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata
    Redundant CORDIC Rotator Based on Parallel Prediction. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1995, pp:172-179 [Conf]
  2. Elisardo Antelo, Tomás Lang, Javier D. Bruguera
    Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1999, pp:204-0 [Conf]
  3. Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli
    Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2005, pp:147-154 [Conf]
  4. Elisardo Antelo, Julio Villalba
    Low Latency Pipelined Circular CORDIC. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2005, pp:280-287 [Conf]
  5. Tomás Lang, Elisardo Antelo
    Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2001, pp:83-93 [Conf]
  6. Tomás Lang, Elisardo Antelo
    CORDIC Vectoring with Arbitrary Target Value. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:108-115 [Conf]
  7. Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli
    Fast Radix-4 Retimed Division with Selection by Comparisons. [Citation Graph (0, 0)][DBLP]
    ASAP, 2002, pp:185-196 [Conf]
  8. Tomás Lang, Elisardo Antelo
    CORDIC-based computation of arccos and arcsin. [Citation Graph (0, 0)][DBLP]
    ASAP, 1997, pp:132-143 [Conf]
  9. Roberto R. Osorio, Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata
    Digit On-line Large Radix CORDIC Rotator. [Citation Graph (0, 0)][DBLP]
    ASAP, 1995, pp:246-257 [Conf]
  10. Julio Villalba, J. C. Arrabal, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera
    Radix-4 Vectoring Cordic Algorithm And Architectures. [Citation Graph (0, 0)][DBLP]
    ASAP, 1996, pp:55-64 [Conf]
  11. Julio Villalba, J. A. Hidalgo, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera
    CORDIC Architectures with Parallel Compensation of the Scale Factor. [Citation Graph (0, 0)][DBLP]
    ASAP, 1995, pp:258-269 [Conf]
  12. Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Julio Villalba, Emilio L. Zapata
    High Radix Cordic Rotation Based on Selection by Rounding. [Citation Graph (0, 0)][DBLP]
    Euro-Par, Vol. II, 1996, pp:155-164 [Conf]
  13. Javier D. Bruguera, Elisardo Antelo, Emilio L. Zapata
    Design of a Pipelined Radix 4 CORDIC Processor. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1993, v:19, n:7, pp:729-744 [Journal]
  14. Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Emilio L. Zapata
    Error Analysis and Reduction for Angle Calculation Using the CORDIC Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:11, pp:1264-1271 [Journal]
  15. Elisardo Antelo, Javier D. Bruguera, Emilio L. Zapata
    Unified Mixed Radix 2-4 Redundant CORDIC Processor. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:9, pp:1068-1073 [Journal]
  16. Elisardo Antelo, Tomás Lang, Javier D. Bruguera
    Very-High Radix Circular CORDIC: Vectoring and Unified Rotation/Vectoring. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:7, pp:727-739 [Journal]
  17. Elisardo Antelo, Tomás Lang, Javier D. Bruguera
    Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root Unit with Scaling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:2, pp:152-161 [Journal]
  18. Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli
    Digit-Recurrence Dividers with Reduced Logical Depth. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:7, pp:837-851 [Journal]
  19. Elisardo Antelo, Julio Villalba, Javier D. Bruguera, Emilio L. Zapata
    High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:8, pp:855-870 [Journal]
  20. Tomás Lang, Elisardo Antelo
    Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1100-1114 [Journal]
  21. Tomás Lang, Elisardo Antelo
    High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:3, pp:347-361 [Journal]
  22. Tomás Lang, Elisardo Antelo
    CORDIC Vectoring with Arbitrary Target Value. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:7, pp:736-749 [Journal]
  23. Alvaro Vazquez, Elisardo Antelo, Paolo Montuschi
    A New Family of High.Performance Parallel Decimal Multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2007, pp:195-204 [Conf]
  24. Elisardo Antelo, Montserrat Bóo, Javier D. Bruguera, Emilio L. Zapata
    A novel design of a two operand normalization circuit. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:1, pp:173-176 [Journal]

  25. A High-Performance Significand BCD Adder with IEEE 754-2008 Decimal Rounding. [Citation Graph (, )][DBLP]


  26. Computation of Decimal Transcendental Functions Using the CORDIC Algorithm. [Citation Graph (, )][DBLP]


  27. New insights on Ling adders. [Citation Graph (, )][DBLP]


  28. A radix-10 SRT divider based on alternative BCD codings. [Citation Graph (, )][DBLP]


Search in 0.231secs, Finished in 0.232secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002