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Publications of Author

1. Fang Wang, Sofiène Tahar, Otmane Aït Mohamed
   First-Order LTL Model Checking Using MDGs. [Citation Graph (0, 0)][DBLP]
   ATVA, 2004, pp:441-455 [Conf]
   
2. Ying Xu, Eduard Cerny, Xiaoyu Song, Francisco Corella, Otmane Aït Mohamed
   Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs. [Citation Graph (0, 0)][DBLP]
   CAV, 1998, pp:219-231 [Conf]
   
3. Otmane Aït Mohamed, Xiaoyu Song, Eduard Cerny
   On the non-termination of MDGs-based abstract state enumeration. [Citation Graph (0, 0)][DBLP]
   CHARME, 1997, pp:218-235 [Conf]
   
4. Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Mohamed, Sofiène Tahar
   On the Design and Verification Methodology of the Look-Aside Interface. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:290-295 [Conf]
   
5. Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Mohamed, Sofiène Tahar
   On the Design and Verification Methodology of the Look-Aside Interface. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:290-295 [Conf]
   
6. Ali Habibi, Sofiène Tahar, Amer Samarah, Donglin Li, Otmane Aït Mohamed
   Efficient assertion based verification using TLM. [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:106-111 [Conf]
   
7. Abdallah Merhebi, Otmane Aït Mohamed
   FPGA implementation of a modular and pipelined WF scheduler for high speed OC192 networks. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2005, pp:422-425 [Conf]
   
8. Otmane Aït Mohamed, Eduard Cerny, Xiaoyu Song
   MDG-based Verification by Retiming and Combinational Transformations. [Citation Graph (0, 0)][DBLP]
   Great Lakes Symposium on VLSI, 1998, pp:356-361 [Conf]
   
9. V. K. Pisini, Sofiène Tahar, Paul Curzon, Otmane Aït Mohamed, Xiaoyu Song
   Formal hardware verification by integrating HOL and MDG. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2000, pp:23-28 [Conf]
   
10. Otmane Aït Mohamed
    Mechanizing a pi-Calculus Equivalence in HOL. [Citation Graph (0, 0)][DBLP]
    TPHOLs, 1995, pp:1-16 [Conf]
    
11. Ying Xu, Xiaoyu Song, Eduard Cerny, Otmane Aït Mohamed
    Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs (MDGs). [Citation Graph (0, 0)][DBLP]
    Comput. J., 2004, v:47, n:1, pp:71-84 [Journal]
    
12. Otmane Aït Mohamed, Xiaoyu Song, Eduard Cerny, Sofiène Tahar, Zijian Zhou
    MDG-Based State Enumeration By Retiming And Circuit Transformation. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2004, v:13, n:5, pp:1111-1132 [Journal]
    
13. Sofiène Tahar, Xiaoyu Song, Eduard Cerny, Zijian Zhou, Michel Langevin, Otmane Aït Mohamed
    Modeling and formal verification of the Fairisle ATM switch fabricusing MDGs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:7, pp:956-972 [Journal]
    
14. Otmane Aït Mohamed, Xiaoyu Song, Eduard Cerny
    On the non-termination of M-based abstract state enumeration. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2003, v:300, n:1-3, pp:161-179 [Journal]
    
15. Fariborz Fereydouni-Forouzandeh, Otmane Aït Mohamed
    A New 10 Gbps Traffic Management algorithm for High-speed Networks. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2510-2513 [Conf]
    
16. Sayed Hafizur Rahman, Asif Iqbal Ahmed, Otmane Aït Mohamed
    Analysis and Performance Evaluation of a Digital Carrier Synchronizer for Modem Applications. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:417-420 [Conf]
    
17. Donglin Li, Otmane Aït Mohamed
    MDG-Based Verification of the Look-Aside Interface. [Citation Graph (0, 0)][DBLP]
    CCECE, 2006, pp:1064-1068 [Conf]
    
18. 
    A Comparative Study of Parallel Prefix Adders in FPGA Implementation of EAC. [Citation Graph (, )][DBLP]
    
    
19. 
    A New Approach for the Construction of Multiway Decision Graphs. [Citation Graph (, )][DBLP]
    
    
20. 
    A New 10 Gbps Traffic Management algorithm for High-speed Networks. [Citation Graph (, )][DBLP]
    
    
21. 
    Towards First-Order Symbolic Trajectory Evaluation. [Citation Graph (, )][DBLP]
    
    
22. 
    MDGs Reduction Technique Based on the HOL Theorem Prover. [Citation Graph (, )][DBLP]
    
    
23. 
    A case study on system-level modeling by aspect-oriented programming. [Citation Graph (, )][DBLP]
    
    
24. 
    On Formal Verification of Occam Programs. [Citation Graph (, )][DBLP]
    
    
25. 
    Reachability analysis using multiway decision graphs in the HOL theorem prover. [Citation Graph (, )][DBLP]
    
    
26. 
    TBCD-TDM: Novel Ultra-Low Energy Protocol for Implantable Wireless Body Sensor Networks. [Citation Graph (, )][DBLP]
    
    
27. 
    The Performance of Combining Multiway Decision Graphs and HOL Theorem Prover. [Citation Graph (, )][DBLP]
    
    
28. 
    Autometic Generation of SystemC Transactors from AsmL Specification. [Citation Graph (, )][DBLP]
    
    
29. 
    LCF-style for Secure Verification Platform based on Multiway Decision Graphs. [Citation Graph (, )][DBLP]
    
    
30. 
    LCF-style Platform based on Multiway Decision Graphs. [Citation Graph (, )][DBLP]