Conferences in DBLP
(iastedCCS) 2005 (conf/iastedCCS/2005)
Huayi Zhang , Ezz I. El-Masry A novel CMOS power efficient and glitch free d-flip-flop for dual-modulus prescaler. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:1-4 [Conf ] Odysseu Tsakiridis , Evangelos Zervas , Eleni Lytra , John Stonham Design of a chaotic modulation scheme based on an electronic controlled colpitts oscillator. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:5-8 [Conf ] R. Kuzet , Heinrich Foltz RF CMOS self-oscillating gilbert cell mixer. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:9-14 [Conf ] Alfredo Restrepo Palacios , Lina Wedefort , Julian Quiroga On the pre-constant signals of the Teager-Kaiser operator. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:15-19 [Conf ] Steven Ball , Ernest Barany , Steve Schaffer , Kevin Wedeward Nonlinear control of power network models using feedback linearization. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:20-25 [Conf ] Sam Mitchum , Robert H. Klenke Design and fabrication of a digitally synthesized, digitally controlled ring oscillator. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:26-30 [Conf ] Giovanni Chiorboli , Silvia Dondi , Carlo Morandi , Davide Vecchi DAC calibration by weighting capacitor rotation in a pipelined ADC. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:31-35 [Conf ] Sevki Erdogan , Michael Eads , Ted Shaneyfelt Virtual hardware management for high performance signal processing. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:36-39 [Conf ] V. Tipsuwarnpron , P. Roengruen , W. Chuchotsakunleot , S. Maitreechit Improved speed rate in current mode algorithmic ADC. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:40-43 [Conf ] Rajarshi Paul , Faruk Nome , Amit Patra , Barry Culpepper Trimming methodologies for compensating process variation errors in second-order bandgap voltage reference circuits. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:44-49 [Conf ] Mauro Olivieri , Francesco Pappalardo , Giuseppe Visalli statistical analysis, for reducing the energy dissipation in a bus-switch encoder. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:50-55 [Conf ] Hussain Al-Asaad EGFC: An exact global fault collapsing tool for combinational circuits. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:56-61 [Conf ] Emre Arslan , Bilgin Metin , Oguzhan Cicekoglu Multi-input single-output cascadable current-mode universal filter topology with a single current conveyor. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:62-66 [Conf ] Satoshi Hirano , Tadashi Kitamura An analysis technique for cascade type oversampling A/D converter and ITS application. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:67-72 [Conf ] Jia Di , Fengwei Yang D3L - A framework on fighting against non-invasive attacks to integrated circuits for security applications. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:73-78 [Conf ] Serhan Yamaçli , Sadri Özcan , Hakan Kuntman Resistorless electronically tunable inductance simulator employing controlled current conveyors (CCCIIS). [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:79-83 [Conf ] Peng-Un Su A reference noise rejected current mirror with a fast start-up mechanism. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:84-88 [Conf ] Po Shuan Wang , Nagy Bengiamin Vibration powered electric systems - a MEMS device. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:89-94 [Conf ] Luis T. Aguilar , Oscar Castillo Homogeneous output feedback tracking control for robot manipulators. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:95-99 [Conf ] Boris Axelrod , Yefim Berkovich , Adrian Ioinovici Transfer and exchange of power in DC-DC converters in similarity with entropy processes. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:100-105 [Conf ] Chieh-Tsung Chi Based on the modified biker's posture approach to solve incongruity problem on sloping surface. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:106-111 [Conf ] Mauro Olivieri , Francesco Pappalardo , Giuseppe Visalli Design issues for bus switch systems in deep sub-micro metric CMOS technologies. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:112-117 [Conf ] Chung-Ming Chen , Chung-Ho Chen An efficient VLSI architecture for edge filtering in H.264/AVC. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:118-122 [Conf ] Franklin Baez , Jon S. Duster , Kevin T. Kornegay A 1.5 V, 5 MW current mode analog baseband processor IC for wideband wireless systems. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:123-127 [Conf ] Jingcheng Zhuang , Qingjin Du , Tad A. Kwasniewski A 4-GB/S half-rate clock and data recovery circuit with a 3-stage VCO. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:128-131 [Conf ] Hussam Al-Hertani , Dhamin Al-Khalili , Come Rozon Leakage power dissipation in UDSM logic gates. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:132-136 [Conf ] Huy Nam Nguyen , Vu-Duc Ngo , Hae-Wook Choi Realization of video object plane decoder on mesh on-chip network architecture. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:137-141 [Conf ] Akira Yamawaki , Masahiko Iwane An efficient parallel processing using a cache memory with synchronization on a Soc-multiprocessor. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:142-147 [Conf ] Yinshui Xia , Xien Ye , Lun-Yao Wang , Zong-Gang Zhou Novel synthesis method of mixed polarity Reed-Muller functions. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:148-153 [Conf ] K. S. Sainarayanan , J. V. R. Ravindra , M. B. Srinivas A novel deep submicron low power bus coding technique. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:154-159 [Conf ] Leran Wang , Tom J. Kazmierski VHDL-AMS modeling of an automotive vibration isolation seating system. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:160-164 [Conf ] Zengjin Lin , Haigang Yang , Lungui Zhong , Jiabin Sun , Shanhong Xia Impact of capacitor array mismatch in embedded CMOS CR SAR ADC design. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:165-168 [Conf ] Jacob Engel , Daniel Lacks , Taskin Koçak Modelling and simulation of off-chip communication architectures for high-speed packet processors. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:169-174 [Conf ] Roberto C. Callarotti Circuital model and proper eigenvalue solution for a fluid mechanical problem. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:175-179 [Conf ] Wen-Shiung Chen , Po-Jen Tsai , Sheng-Wen Shih , Chih-Ming Hsieh , Lili Hsieh An iris recognition technique based on multi-feature extraction and support vector machine. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:180-185 [Conf ] Shimul C. Saha , Ulrik Hanke , Geir U. Jensen , Anton M. Bøifot , Tor A. Fjeldly , Trond Sæther Modeling and simulation of high capacitance ratio RF MEMS shunt switch. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:186-193 [Conf ] Sira Rao , Nikil Jayant A flexible approach to spatial quality distribution in wireless medical video. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:194-199 [Conf ] Nitin Suresh , Nikil Jayant Subjective video quality metrics based on failure statistics. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:200-205 [Conf ] Frank Y. Shih , Yan-Yu Fu Color correction for color distorted images. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:206-211 [Conf ] Sira Rao , Nikil Jayant , Babak Firoozbakhsh Towards high quality region-of-interest medical video over wireless networks using motion compensated temporal filtering. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:212-217 [Conf ] Vasily G. Moshnyaga , Naoki Migita , Kenji Wakisaka Reduction of MPEG2 video decoding computations. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:218-221 [Conf ] Francesco Menichelli , Mauro Olivieri , Simone Smorfa , Irene Zaccardini Software optimization of the JPEG2000 algorithm on a VLIW CPU core for system-on-chip implementation. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:222-227 [Conf ] Oladipo O. Fadiran , Péter Molnár , Lance M. Kaplan Towards quantifying clutter in hyperspectral infrared images. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:228-233 [Conf ] Zheng Ma , Feng Yang Vehicle license plate detection based on projection and mathematical morphology. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:234-238 [Conf ] Jia-Ching Wang , Jhing-Fa Wang , Yun-Fei Chao , Ming-Chi Shi VLSI design of a very low bit rate speech decoder. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:239-243 [Conf ] Soeren R. Sappok , Andreas Neyer , Andre Kruth Automated calibration technique for predistortion modulation loops using asynchronous phase detection. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:244-249 [Conf ] Siho Kim , Jun Kim , Keun-Sung Bae Speech interface with echo cancellation and barge-in functionalities for robust speech recognition in the car environment. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:250-254 [Conf ] Kouhei Nagasawa , Naoyuki Aikawa Design method of kernel for sampling rate converter using semidefinite programming. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:255-259 [Conf ] Petar Josipovic , Hrvoje Babic Simple method for FIR filter design based on frequency sampling approach. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:260-263 [Conf ] M. Balzer , H. Stripf DSP-FPGA multiprocessor system with CAN, PPI, and ethernet interfaces. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:264-269 [Conf ] Said E. El-Khamy , Shawkii E. Shabban , Essam Thabet Anti-jamming performance of wide band multi-user using chaos modulation techniques. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:270-275 [Conf ] Byung Sik Yoon , Hyung Jung Kim , Man Ho Park , Deok Gu Gee , Song In Choi A proposed method for complexity reduction algorithm of wideband AMR speech coder. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:276-280 [Conf ] Sevki Erdogan , Ted Shaneyfelt , Andrew Honma , Michael Eads , Cam Muir Following the nene: Endangered hawaiian bird. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:281-285 [Conf ] Josef Dobes , Ladislav Pospisil Exclusive and corrective artificial neural networks for accurate modeling the RF semiconductor devices. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:286-291 [Conf ] John Hammond , Stephen Fischer , Iren Valova Parallel algorithm for growing SOM with regions of influence and neuron inertia. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:292-297 [Conf ] Koray Karahaliloglu Guided autowaves across a bio-inspired excitable system. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:298-302 [Conf ] Derek Beaton , Iren Valova Alzheimer's detection using neural network techniques and enhanced EEG measurements. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:303-307 [Conf ] Dhireesha Kudithipudi , Eugene John Parametrical characterization of leakage power in embedded system caches using gated-VSS. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:308-312 [Conf ] Azgad C. Ramos , Hugo G. González-Hernández Associating dynamical descriptors to EEG from healthy and epileptic subjects. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:313-318 [Conf ] V. Jaiganesh , Murugan Sankaradass PC based heart rate monitor implemented in XILINX FPGA and analysing the heart rate. [Citation Graph (0, 0)][DBLP ] Circuits, Signals, and Systems, 2005, pp:319-323 [Conf ]