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Mauro Olivieri: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Federico Angiolini, Francesco Menichelli, Alberto Ferrero, Luca Benini, Mauro Olivieri
    A post-compiler approach to scratchpad mapping of code. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:259-267 [Conf]
  2. Francesco Menichelli, Mauro Olivieri, Luca Benini, Monica Donno, Labros Bisdounis
    A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:312-317 [Conf]
  3. Alessandro De Gloria, Paolo Palma, Mauro Olivieri
    Delay-Insensitive Synthesis of the MCS 251 Microcontroller Core for Low Power Applications. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1244-1247 [Conf]
  4. Mauro Olivieri, Alessandro Trifiletti, Alessandro De Gloria
    A Low-Power Microcontroller with on-Chip Self-Tuning Digital Clock-Generator for Variable-Load Applications. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:476-481 [Conf]
  5. Mauro Olivieri, Marco Raspa
    Power Efficiency of Application-Dependent Self-Configuring Pipeline Depth in DSP Microprocessors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:185- [Conf]
  6. Manfred Josef Aigner, Stefan Mangard, Renato Menicocci, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti
    A novel CMOS logic style with data independent power consumption. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1066-1069 [Conf]
  7. Francesco Centurelli, Stefano Costi, Mauro Olivieri, Salvatore Pennisi, Alessandro Trifiletti
    Robust three-state PFD architecture with enhanced frequency acquisition capabilities. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:812-815 [Conf]
  8. Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli
    Encoding circuits for low power optical on-chip communications. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:5206-5209 [Conf]
  9. Mauro Olivieri, Mirko Scarana, Simone Smorfa
    Circuit-level power efficiency investigation of advanced DSP architectures based on a specialized power modeling technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:5266-5269 [Conf]
  10. Mauro Olivieri, Alessandro Trifiletti
    An all-digital clock generator firm-core based on differential fine-tuned delay for reusable microprocessor cores. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:638-641 [Conf]
  11. Alessandro De Gloria, Mauro Olivieri
    An application specific multi-port RAM cell circuit for register renaming units in high speed microprocessors. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:934-937 [Conf]
  12. Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri
    An analysis of dynamic scheduling techniques for symbolic applications. [Citation Graph (0, 0)][DBLP]
    MICRO, 1993, pp:185-191 [Conf]
  13. Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri
    A non-deterministic scheduler for a software pipelining compiler. [Citation Graph (0, 0)][DBLP]
    MICRO, 1992, pp:41-44 [Conf]
  14. Mauro Olivieri, Mirko Scarana, Giuseppe Scotti, Alessandro Trifiletti
    Yield Optimization by Means of Process Parameters Estimation: Comparison Between ABB and ASV Techniques. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:119-128 [Conf]
  15. Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli
    statistical analysis, for reducing the energy dissipation in a bus-switch encoder. [Citation Graph (0, 0)][DBLP]
    Circuits, Signals, and Systems, 2005, pp:50-55 [Conf]
  16. Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli
    Design issues for bus switch systems in deep sub-micro metric CMOS technologies. [Citation Graph (0, 0)][DBLP]
    Circuits, Signals, and Systems, 2005, pp:112-117 [Conf]
  17. Francesco Menichelli, Mauro Olivieri, Simone Smorfa, Irene Zaccardini
    Software optimization of the JPEG2000 algorithm on a VLIW CPU core for system-on-chip implementation. [Citation Graph (0, 0)][DBLP]
    Circuits, Signals, and Systems, 2005, pp:222-227 [Conf]
  18. Mauro Bertacchi, Alessandro De Gloria, Daniele Grosso, Mauro Olivieri
    Semicustom Design of an IEEE 1394-Compliant Reusable IC Core. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2000, v:17, n:3, pp:95-105 [Journal]
  19. Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri
    Clustered Boltzmann Machines: Massively Parallel Architectures for Constrained Optimization Problems. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1993, v:19, n:2, pp:163-175 [Journal]
  20. Luca Benini, Francesco Menichelli, Mauro Olivieri
    A Class of Code Compression Schemes for Reducing Power Consumption in Embedded Microprocessor Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:4, pp:467-482 [Journal]
  21. Alessandro De Gloria, Mauro Olivieri
    Statistical Carry Lookahead Adders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:3, pp:340-347 [Journal]
  22. Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri
    Block placement with a Boltzmann Machine. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:6, pp:694-701 [Journal]
  23. Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli
    Bus-switch coding for reducing power dissipation in off-chip buses. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:12, pp:1374-1377 [Journal]
  24. Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti
    A novel yield optimization technique for digital CMOS circuits design by means of process parameters run-time estimation and body bias active control. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:5, pp:630-638 [Journal]
  25. Manfred Josef Aigner, Stefan Mangard, Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Thomas Popp, Giuseppe Scotti, Alessandro Trifiletti
    Side channel analysis resistant design flow. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  26. Francesco Centurelli, Luca Giancane, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti
    A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2007, pp:516-525 [Conf]
  27. Mauro Olivieri, Simone Smorfa, Alessandro Trifiletti
    Design and Test of a Novel Programmable Clock Generator Semi-Custom Core for Energy-Efficient Systems-on-Chips. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2005, v:1, n:3, pp:309-318 [Journal]

  28. Adaptive idleness distribution for non-uniform aging tolerance in MultiProcessor Systems-on-Chip. [Citation Graph (, )][DBLP]


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