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David W. Matula: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Farhad Shahrokhi, David W. Matula
    On solving large maximum concurrent flow problems. [Citation Graph (0, 0)][DBLP]
    ACM Conference on Computer Science, 1987, pp:205-209 [Conf]
  2. Cristina Iordache, David W. Matula
    On Infinitely Precise Rounding for Division, Square Root, Reciprocal and Square Root Reciprocal. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1999, pp:233-240 [Conf]
  3. Peter Kornerup, David W. Matula
    Single Precision Reciprocals by Multipartite Table Lookup. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2005, pp:240-248 [Conf]
  4. Chung Nan Lyu, David W. Matula
    Redundant Binary Booth Recoding. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1995, pp:50-0 [Conf]
  5. David W. Matula
    Improved Table Lookup Algorithms for Postscaled Division. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2001, pp:101-0 [Conf]
  6. David W. Matula
    Computer Arithmetic - An Algorithm Engineer?s Perspective. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2003, pp:2-0 [Conf]
  7. David W. Matula, Alex Fit-Florea
    Prescaled Integer Division. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2003, pp:63-0 [Conf]
  8. David W. Matula, Alex Fit-Florea, Mitchell Aaron Thornton
    Table Lookup Structures for Multiplicative Inverses Modulo 2k. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2005, pp:156-163 [Conf]
  9. David W. Matula, Asger Munk Nielsen
    Pipelined Packet-Forwarding Floating Point: I. Foundations and a Rounder. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:140-147 [Conf]
  10. Lee D. McFearin, David W. Matula
    Generation and Analysis of Hard to Round Cases for Binary Floating Point Division. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2001, pp:119-127 [Conf]
  11. Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even
    Pipelined Packet-Forwarding Floating Point: II. An Adder. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:148-155 [Conf]
  12. Debjit Das Sarma, David W. Matula
    Faithful Bipartite ROM Reciprocal Tables. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1995, pp:17-0 [Conf]
  13. Debjit Das Sarma, David W. Matula
    Faithful Interpolation in Reciprocal Tables. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:82-91 [Conf]
  14. Peter-Michael Seidel, Lee D. McFearin, David W. Matula
    Binary Multiplication Radix-32 and Radix-256. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2001, pp:23-32 [Conf]
  15. Marc Daumas, David W. Matula
    A Booth Multiplier Accepting Both a Redundant or a Non-Redundant Input with No Additional Delay. [Citation Graph (0, 0)][DBLP]
    ASAP, 2000, pp:205-214 [Conf]
  16. Alex Fit-Florea, David W. Matula
    A Digit-Serial Algorithm for the Discrete Logarithm Modulo 2k. [Citation Graph (0, 0)][DBLP]
    ASAP, 2004, pp:236-246 [Conf]
  17. Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula
    Performance Evaluation of a Novel Direct Table Lookup Method and Architecture with Application to 16-bit Integer Functions. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:99-104 [Conf]
  18. David W. Matula, Alex Fit-Florea, Lee D. McFearin
    Evaluating Products of Non Linear Functions by Indirect Bipartite Table Lookup. [Citation Graph (0, 0)][DBLP]
    ASAP, 2002, pp:120-129 [Conf]
  19. Hakki C. Cankaya, David W. Matula, Mihaela Iridon
    Performance Analysis of a Graph Model for Channel Assignment in a Cellular Network. [Citation Graph (0, 0)][DBLP]
    COMPSAC, 1999, pp:239-0 [Conf]
  20. David W. Matula, Lee D. McFearin
    A formal model and efficient traversal algorithm for generating testbenches for verification of IEEE standard floating point division. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:1134-1138 [Conf]
  21. David W. Matula, Peter Kornerup
    An approximate rational arithmetic system with intrinsic recovery of simple fractions during expression evaluation. [Citation Graph (0, 0)][DBLP]
    EUROSAM, 1979, pp:383-397 [Conf]
  22. Jit Biswas, David W. Matula
    Two Flow Routing Algorithms for the Maximum Concurrent-Flow Problem. [Citation Graph (0, 0)][DBLP]
    FJCC, 1986, pp:629-636 [Conf]
  23. David W. Matula
    Determining Edge Connectivity in O(nm) [Citation Graph (0, 0)][DBLP]
    FOCS, 1987, pp:249-251 [Conf]
  24. Lun Li, Mitchell A. Thornton, David W. Matula
    A digit serial algorithm for the integer power operation. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:302-307 [Conf]
  25. Mihaela Iridon, David W. Matula
    Symmetric Cellular Network Embeddings on a Torus. [Citation Graph (0, 0)][DBLP]
    ICCCN, 1998, pp:732-736 [Conf]
  26. Lee D. McFearin, David W. Matula
    Selecting A Well Distributed Hard Case Test Suite for IEEE Standard Floating Point Division. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:89-97 [Conf]
  27. David W. Matula
    Significant Digits: Numerical Analysis or Numerology. [Citation Graph (0, 0)][DBLP]
    IFIP Congress (2), 1971, pp:1278-1283 [Conf]
  28. Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula
    Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2k. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:130-135 [Conf]
  29. David W. Matula
    A Linear Time 2+epsilon Approximation Algorithm for Edge Connectivity. [Citation Graph (0, 0)][DBLP]
    SODA, 1993, pp:500-504 [Conf]
  30. David W. Matula
    Design of a highly parallel IEEE standard floating point unit: the Cyrix 83D87 coprocessor. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:334- [Conf]
  31. David W. Matula
    In-and-out conversions. [Citation Graph (0, 0)][DBLP]
    Commun. ACM, 1968, v:11, n:1, pp:47-50 [Journal]
  32. David W. Matula
    Expose-and-merge exploration and the chromatic number of random graph. [Citation Graph (0, 0)][DBLP]
    Combinatorica, 1987, v:7, n:3, pp:275-284 [Journal]
  33. Abbas Edalat, David W. Matula, Philipp Sünderhauf
    Preface. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 1999, v:24, n:, pp:- [Journal]
  34. Cristina Iordache, David W. Matula
    Analysis of Reciprocal and Square Root Reciprocal Instructions in the AMD K6-2 Implementation of 3DNow! [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 1999, v:24, n:, pp:- [Journal]
  35. David W. Matula
    Basic digit sets for radix representation. [Citation Graph (0, 0)][DBLP]
    J. ACM, 1982, v:29, n:4, pp:1131-1143 [Journal]
  36. David W. Matula, Leland L. Beck
    Smallest-Last Ordering and clustering and Graph Coloring Algorithms [Citation Graph (0, 0)][DBLP]
    J. ACM, 1983, v:30, n:3, pp:417-427 [Journal]
  37. Farhad Shahrokhi, David W. Matula
    The Maximum Concurrent Flow Problem [Citation Graph (0, 0)][DBLP]
    J. ACM, 1990, v:37, n:2, pp:318-334 [Journal]
  38. David W. Matula
    k-Blocks and ultrablocks in graphs. [Citation Graph (0, 0)][DBLP]
    J. Comb. Theory, Ser. B, 1978, v:24, n:1, pp:1-13 [Journal]
  39. Mihaela Iridon, David W. Matula
    Regular Triangulated Toroidal Graphs with Applications to Cellular and Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    J. Graph Algorithms Appl., 2002, v:6, n:4, pp:373-404 [Journal]
  40. Peter Kornerup, David W. Matula
    An On-Line Arithmetic Unit for Bit-Pipelined Rational Arithmetic. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1988, v:5, n:3, pp:310-330 [Journal]
  41. Peter Kornerup, David W. Matula
    LCF: A Lexicagraphic Binary representation of the Rationals. [Citation Graph (0, 0)][DBLP]
    J. UCS, 1995, v:1, n:7, pp:484-503 [Journal]
  42. Debjit Das Sarma, David W. Matula
    Measuring the Accuracy of ROM Reciprocal Tables. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:8, pp:932-940 [Journal]
  43. Marc Daumas, David W. Matula
    Validated Roundings of Dot Products by Sticky Accumulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:5, pp:623-629 [Journal]
  44. Milos D. Ercegovac, Laurent Imbert, David W. Matula, Jean-Michel Muller, Guoheng Wei
    Improving Goldschmidt Division, Square Root, and Square Root Reciprocal. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:7, pp:759-763 [Journal]
  45. Peter Kornerup, David W. Matula
    Finite Precision Rational Arithmetic: An Arithmetic Unit. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:4, pp:378-388 [Journal]
  46. Peter Kornerup, David W. Matula
    An Algorithm for Redundant Binary Bit-Pipelined Rational Arithmetic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:8, pp:1106-1115 [Journal]
  47. David W. Matula, Peter Kornerup
    Finite Precision Rational Arithmetic Slash Number Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:1, pp:3-18 [Journal]
  48. Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even
    An IEEE Compliant Floating-Point Adder that Conforms with the Pipelined Packet-Forwarding Paradigm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:1, pp:33-47 [Journal]
  49. Peter-Michael Seidel, Lee D. McFearin, David W. Matula
    Secondary Radix Recodings for Higher Radix Multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:2, pp:111-123 [Journal]
  50. David W. Matula, Lee D. McFearin
    A p×p bit fraction model of binary floating point division and extremal rounding cases. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2003, v:291, n:2, pp:159-182 [Journal]
  51. Mihaela Iridon, David W. Matula, Cheng Yang
    A Graph Theoretic Approach for Channel Assignment in Cellular Networks. [Citation Graph (0, 0)][DBLP]
    Wireless Networks, 2001, v:7, n:6, pp:567-574 [Journal]
  52. Alex Fit-Florea, David W. Matula
    Determining all pairs edge connectivity of a 4-regular graph in O(|V|). [Citation Graph (0, 0)][DBLP]
    AICCSA, 2005, pp:15- [Conf]

  53. Employing (1 - epsilon) Dominating Set Partitions as Backbones in Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  54. Design of a fast validated dot product operation. [Citation Graph (, )][DBLP]


  55. A 17 × 69 bit multiply and add unit with redundant binary feedback and single cycle latency. [Citation Graph (, )][DBLP]


  56. Higher Radix Squaring Operations Employing Left-to-Right Dual Recoding. [Citation Graph (, )][DBLP]


  57. Measuring the accuracy of ROM reciprocal tables. [Citation Graph (, )][DBLP]


  58. A Low Power High Performance Radix-4 Approximate Squaring Circuit. [Citation Graph (, )][DBLP]


  59. Approximating the independent domatic partition problem in random geometric graphs - an experimental study. [Citation Graph (, )][DBLP]


  60. Building (1 - epsilon) Dominating Sets Partition as Backbones in Wireless Sensor Networks Using Distributed Graph Coloring. [Citation Graph (, )][DBLP]


  61. Quantum Logic Implementation of Unary Arithmetic Operations. [Citation Graph (, )][DBLP]


  62. Foundations of Higher Radix Numeric Computation. [Citation Graph (, )][DBLP]


  63. Experimental Study of Independent and Dominating Sets in Wireless Sensor Networks Using Graph Coloring Algorithms. [Citation Graph (, )][DBLP]


  64. Sparsest cuts and bottlenecks in graphs. [Citation Graph (, )][DBLP]


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