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Marco Bekooij:
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Publications of Author
- Amir Hossein Ghamarian, Marc Geilen, Sander Stuijk, Twan Basten, Bart D. Theelen, Mohammad Reza Mousavi, A. J. M. Moonen, Marco Bekooij
Throughput Analysis of Synchronous Data Flow Graphs. [Citation Graph (0, 0)][DBLP] ACSD, 2006, pp:25-36 [Conf]
- Peter Poplavko, Twan Basten, Marco Bekooij, Jef L. van Meerbergen, Bart Mesman
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip. [Citation Graph (0, 0)][DBLP] CASES, 2003, pp:63-72 [Conf]
- Maarten Wiggers, Marco Bekooij, Pierre Jansen, Gerard J. M. Smit
Efficient computation of buffer capacities for multi-rate real-time systems with back-pressure. [Citation Graph (0, 0)][DBLP] CODES+ISSS, 2006, pp:10-15 [Conf]
- Marco Bekooij, Loek J. M. Engels, Albert van der Werf, Natalino G. Busá
Functional units with conditional input/output behavior in VLIW processors. [Citation Graph (0, 0)][DBLP] DATE, 2001, pp:822- [Conf]
- John Dielissen, Jef L. van Meerbergen, Marco Bekooij, Françoise Harmsze, Sergej Sawitzki, Jos Huisken, Albert van der Werf
Power-efficient layered turbo decoder processor. [Citation Graph (0, 0)][DBLP] DATE, 2001, pp:246-251 [Conf]
- Marco Bekooij, Jochen A. G. Jess, Jef L. van Meerbergen
Phase coupled operation assignment for VLIW processors with distributed register files. [Citation Graph (0, 0)][DBLP] ISSS, 2001, pp:118-123 [Conf]
- Natalino G. Busá, Albert van der Werf, Marco Bekooij
Scheduling Coarse-Grain Operations for VLIW Processors. [Citation Graph (0, 0)][DBLP] ISSS, 2000, pp:47-54 [Conf]
- Peter Poplavko, Twan Basten, Milan Pastrnak, Jef L. van Meerbergen, Marco Bekooij, Peter H. N. de With
Extended abstract: estimation times of on-chip multiprocessor stream-oriented applications. [Citation Graph (0, 0)][DBLP] MEMOCODE, 2005, pp:250-251 [Conf]
- Orlando Moreira, Jan-David Mol, Marco Bekooij, Jef L. van Meerbergen
Multiprocessor Resource Allocation for Hard-Real-Time Streaming with a Dynamic Job-Mix. [Citation Graph (0, 0)][DBLP] IEEE Real-Time and Embedded Technology and Applications Symposium, 2005, pp:332-341 [Conf]
- Orlando Moreira, Jacob Jan-David Mol, Marco Bekooij
Online resource management in a multiprocessor with a network-on-chip. [Citation Graph (0, 0)][DBLP] SAC, 2007, pp:1557-1564 [Conf]
- Marco Bekooij, Jef L. van Meerbergen, Sonali Parma
Performance Guarantees by Simulation of Process Networks. [Citation Graph (0, 0)][DBLP] SCOPES, 2005, pp:10-19 [Conf]
- Marco Bekooij, Orlando Moreira, Peter Poplavko, Bart Mesman, Milan Pastrnak, Jef L. van Meerbergen
Predictable Embedded Multiprocessor System Design. [Citation Graph (0, 0)][DBLP] SCOPES, 2004, pp:77-91 [Conf]
- Koen van Eijk, Bart Mesman, Carlos A. Alba Pinto, Qin Zhao, Marco Bekooij, Jef L. van Meerbergen, Jochen A. G. Jess
Constraint analysis for code generation: basic techniques and applications in FACTS. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2000, v:5, n:4, pp:774-793 [Journal]
- Maarten Wiggers, Marco Bekooij, Gerard J. M. Smit
Efficient Computation of Buffer Capacities for Cyclo-Static Dataflow Graphs. [Citation Graph (0, 0)][DBLP] DAC, 2007, pp:658-663 [Conf]
A tuneable software cache coherence protocol for heterogeneous MPSoCs. [Citation Graph (, )][DBLP]
Computation of Buffer Capacities for Throughput Constrained and Data Dependent Inter-Task Communication. [Citation Graph (, )][DBLP]
Formal Methods in System and MpSoC Performance Analysis and Optimisation. [Citation Graph (, )][DBLP]
Cache Aware Mapping of Streaming Applications on a Multiprocessor System-on-Chip. [Citation Graph (, )][DBLP]
Programming MPSoC platforms: Road works ahead! [Citation Graph (, )][DBLP]
Simultaneous budget and buffer size computation for throughput-constrained task graphs. [Citation Graph (, )][DBLP]
Decoupling of Computation and Communication with a Communication Assist. [Citation Graph (, )][DBLP]
Streaming consistency: a model for efficient MPSoC design. [Citation Graph (, )][DBLP]
A Priority-Based Budget Scheduler with Conservative Dataflow Model. [Citation Graph (, )][DBLP]
Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor. [Citation Graph (, )][DBLP]
Monotonicity and run-time scheduling. [Citation Graph (, )][DBLP]
Dataflow models for shared memory access latency analysis. [Citation Graph (, )][DBLP]
Practical and Accurate Throughput Analysis with the Cyclo Static Dataflow Model. [Citation Graph (, )][DBLP]
Buffer Capacity Computation for Throughput Constrained Streaming Applications with Data-Dependent Inter-Task Communication. [Citation Graph (, )][DBLP]
Efficient Computation of Buffer Capacities for Cyclo-Static Real-Time Systems with Back-Pressure. [Citation Graph (, )][DBLP]
Inter-task communication via overlapping read and write windows for deadlock-free execution of cyclic task graphs. [Citation Graph (, )][DBLP]
Communication between nested loop programs via circular buffers in an embedded multiprocessor system. [Citation Graph (, )][DBLP]
Modelling run-time arbitration by latency-rate servers in dataflow graphs. [Citation Graph (, )][DBLP]
Efficient buffer capacity and scheduler setting computation for soft real-time stream processing applications. [Citation Graph (, )][DBLP]
Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip. [Citation Graph (, )][DBLP]
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