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Arnaud Tisserand:
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Publications of Author
- Jean-Michel Muller, Arnaud Tisserand, Benoît Dupont de Dinechin, Christophe Monat
Division by Constant for the ST100 DSP Microprocessor. [Citation Graph (0, 0)][DBLP] IEEE Symposium on Computer Arithmetic, 2005, pp:124-130 [Conf]
- Jean-Michel Muller, Arnaud Tisserand, Alexandre Scherbyna
Semi-Logarithmic Number Systems. [Citation Graph (0, 0)][DBLP] IEEE Symposium on Computer Arithmetic, 1995, pp:201-207 [Conf]
- Nicolas Boullis, Arnaud Tisserand
Some Optimizations of Hardware Multiplication by Constant Matrices. [Citation Graph (0, 0)][DBLP] IEEE Symposium on Computer Arithmetic, 2003, pp:20-27 [Conf]
- Vincent Lefèvre, Arnaud Tisserand, Jean-Michel Muller
Towards Correctly Rounded Transcendentals. [Citation Graph (0, 0)][DBLP] IEEE Symposium on Computer Arithmetic, 1997, pp:132-0 [Conf]
- Florent de Dinechin, Arnaud Tisserand
Some Improvements on Multipartite Table Methods . [Citation Graph (0, 0)][DBLP] IEEE Symposium on Computer Arithmetic, 2001, pp:128-135 [Conf]
- Romain Michard, Arnaud Tisserand, Nicolas Veyrat-Charvillon
Small FPGA polynomial approximations with 3-bit coefficients and low-precision estimations of the powers of x. [Citation Graph (0, 0)][DBLP] ASAP, 2005, pp:334-342 [Conf]
- Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon
Multi-Mode Operator for SHA-2 Hash Functions. [Citation Graph (0, 0)][DBLP] ERSA, 2006, pp:207-210 [Conf]
- Jean-Luc Beuchat, Arnaud Tisserand
Small Multiplier-Based Multiplication and Division Operators for Virtex-II Devices. [Citation Graph (0, 0)][DBLP] FPL, 2002, pp:513-522 [Conf]
- Arnaud Tisserand, Martin Dimmler
FPGA implementation of real-time digital controllers using on-line arithmetic. [Citation Graph (0, 0)][DBLP] FPL, 1997, pp:472-481 [Conf]
- Arnaud Tisserand, Pierre Marchal, Christian Piguet
An On-Line Arithmetic Based FPGA for Low-Power Custom Computing. [Citation Graph (0, 0)][DBLP] FPL, 1999, pp:264-273 [Conf]
- Pascal Nussbaum, Bernard Girau, Arnaud Tisserand
Field Programmable Processor Arrays. [Citation Graph (0, 0)][DBLP] ICES, 1998, pp:311-322 [Conf]
- A. Byrne, Nicolas Meloni, Francis M. Crowe, William P. Marnane, Arnaud Tisserand, Emanuel M. Popovici
SPA resistant Elliptic Curve Cryptosystem using Addition Chains. [Citation Graph (0, 0)][DBLP] ITNG, 2007, pp:995-1000 [Conf]
- Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon
Multi-mode operator for SHA-2 hash functions. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 2007, v:53, n:2-3, pp:127-138 [Journal]
- Nicolas Boullis, Arnaud Tisserand
Some Optimizations of Hardware Multiplication by Constant Matrices. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2005, v:54, n:10, pp:1271-1282 [Journal]
- Florent de Dinechin, Arnaud Tisserand
Multipartite Table Methods. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2005, v:54, n:3, pp:319-330 [Journal]
- Milos D. Ercegovac, Tomás Lang, Jean-Michel Muller, Arnaud Tisserand
Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions Using Small Multipliers. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2000, v:49, n:7, pp:628-637 [Journal]
- Vincent Lefèvre, Jean-Michel Muller, Arnaud Tisserand
Toward Correctly Rounded Transcendentals. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1998, v:47, n:11, pp:1235-1243 [Journal]
- Jean-Michel Muller, Alexandre Scherbyna, Arnaud Tisserand
Semi-Logarithmic Number Systems. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1998, v:47, n:2, pp:145-151 [Journal]
- Nicolas Brisebarre, Jean-Michel Muller, Arnaud Tisserand
Computing machine-efficient polynomial approximations. [Citation Graph (0, 0)][DBLP] ACM Trans. Math. Softw., 2006, v:32, n:2, pp:236-256 [Journal]
- Jean-Luc Beuchat, Arnaud Tisserand
Évaluation polynomiale en-ligne de fonctions élémentaires sur FPGA. [Citation Graph (0, 0)][DBLP] Technique et Science Informatiques, 2004, v:23, n:10, pp:1247-1267 [Journal]
- Rachid Beguenane, Jean-Gabriel Mailloux, Stéphane Simard, Arnaud Tisserand
Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time. [Citation Graph (0, 0)][DBLP] CCECE, 2006, pp:1073-1077 [Conf]
Error Detection for Borrow-Save Adders Dedicated to ECC Unit. [Citation Graph (, )][DBLP]
Power Consumption of GPUs from a Software Perspective. [Citation Graph (, )][DBLP]
Carry Prediction and Selection for Truncated Multiplication. [Citation Graph (, )][DBLP]
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