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## Search the dblp DataBase
G. Venkatesh:
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## Publications of Author- Milind Gandhe, G. Venkatesh, Amitabha Sanyal
**Labeled Lambda-Calculus and a Generalized Notion of Strictness (An Extended Abstract).**[Citation Graph (0, 0)][DBLP] ASIAN, 1995, pp:103-110 [Conf] - Manoranjan Satpathy, Amitabha Sanyal, G. Venkatesh
**An Automaton-Driven Frame Disposal Algorithm and its Proof of Correctness.**[Citation Graph (0, 0)][DBLP] ASIAN, 1995, pp:88-102 [Conf] - Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh
**Techniques for low power realization for FIR filters.**[Citation Graph (0, 0)][DBLP] ASP-DAC, 1995, pp:- [Conf] - S. Bapat, G. Venkatesh
**Reasoning about digital systems using temporal logic.**[Citation Graph (0, 0)][DBLP] DAC, 1986, pp:215-219 [Conf] - Mahesh Mehendale, G. Venkatesh, Sunil D. Sherlekar
**Optimized Code Generation of Multiplication-free Linear Transforms.**[Citation Graph (0, 0)][DBLP] DAC, 1996, pp:41-46 [Conf] - Milind Gandhe, G. Venkatesh, Amitabha Sanyal
**Correcting Errors in the Curry System.**[Citation Graph (0, 0)][DBLP] FSTTCS, 1996, pp:347-358 [Conf] - G. Venkatesh
**Reasoning About Game Equilibria Using Temporal Logic.**[Citation Graph (0, 0)][DBLP] FSTTCS, 2004, pp:506-517 [Conf] - G. Venkatesh
**A Decision Method for Temporal Logic Based on Resolution.**[Citation Graph (0, 0)][DBLP] FSTTCS, 1985, pp:272-289 [Conf] - Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh
**Synthesis of multiplier-less FIR filters with minimum number of additions.**[Citation Graph (0, 0)][DBLP] ICCAD, 1995, pp:668-671 [Conf] - Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar
**A Methodology for Designing Optimal Self-Checking Sequential Circuits.**[Citation Graph (0, 0)][DBLP] ITC, 1991, pp:283-291 [Conf] - Milind Gandhe, G. Venkatesh
**Improving Prolog Performance by Inductive Proof Generalizations.**[Citation Graph (0, 0)][DBLP] KBCS, 1989, pp:243-253 [Conf] - Mohsin Ahmed, G. Venkatesh
**A Propositional Dense Time Logic (Based on Nested Sequences).**[Citation Graph (0, 0)][DBLP] TAPSOFT, 1993, pp:584-598 [Conf] - B. Ravi Kishore, Rubin A. Parekhji, Sandeep Pagey, Sunil D. Sherlekar, G. Venkatesh
**A new methodology for the design of low-cost fail safe circuits and networks.**[Citation Graph (0, 0)][DBLP] VLSI Design, 1995, pp:355-358 [Conf] - Mahesh Mehendale, Somdipta Basu Roy, Sunil D. Sherlekar, G. Venkatesh
**Coefficient Transformations for Area-Efficient Implementation of Multiplier-less FIR Filters.**[Citation Graph (0, 0)][DBLP] VLSI Design, 1998, pp:110-115 [Conf] - Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh
**Low power realization of FIR filters using multirate architectures.**[Citation Graph (0, 0)][DBLP] VLSI Design, 1996, pp:370-375 [Conf] - Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh
**Area-Delay Tradeoff in Distributed Arithmetic Based Implementation of FIR Filters.**[Citation Graph (0, 0)][DBLP] VLSI Design, 1997, pp:124-129 [Conf] - Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh
**Algorithmic and Architectural Transformations for Low Power Realization of FIR Filters.**[Citation Graph (0, 0)][DBLP] VLSI Design, 1998, pp:12-17 [Conf] - Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh
**Extensions to Programmable DSP architectures for Reduced Power Dissipation.**[Citation Graph (0, 0)][DBLP] VLSI Design, 1998, pp:37-0 [Conf] - Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar
**State Assignment for Optimal Design of Monitored Self-Checking Sequential Circuits.**[Citation Graph (0, 0)][DBLP] VLSI Design, 1993, pp:15-20 [Conf] - Ajay Khoche, Sunil D. Sherlekar, G. Venkatesh, Raja Venkateswaran
**A Behavioral Fault Simulator for Ideal.**[Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 1992, v:9, n:4, pp:14-21 [Journal] - Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar
**Concurrent Error Detection Using Monitoring Machines.**[Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 1995, v:12, n:3, pp:24-32 [Journal] - Manoranjan Satpathy, Amitabha Sanyal, G. Venkatesh
**Improved Register Usage for Functional Programs through Multiple Function Versions.**[Citation Graph (0, 0)][DBLP] Journal of Functional and Logic Programming, 1998, v:1998, n:7, pp:- [Journal] - Mohsin Ahmed, G. Venkatesh
**Dense Time Logic Programming.**[Citation Graph (0, 0)][DBLP] J. Symb. Comput., 1996, v:22, n:5/6, pp:585-613 [Journal] - Donald F. Towsley, G. Venkatesh
**Window Random Access Protocols for Local Computer Networks.**[Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1982, v:31, n:8, pp:715-722 [Journal] - Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh
**Low-power realization of FIR filters on programmable DSPs.**[Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1998, v:6, n:4, pp:546-553 [Journal]
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