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Publications of Author

1. Tong Jing, Ling Zhang, Jinghong Liang, Jingyu Xu, Xianlong Hong, Jinjun Xiong, Lei He
   A Min-area Solution to Performance and RLC Crosstalk Driven Global Routing Problem. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2005, pp:115-120 [Conf]
   
2. Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu
   An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:473-478 [Conf]
   
3. Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu
   A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2004, pp:677-682 [Conf]
   
4. Jingyu Xu, Xianlong Hong, Tong Jing
   Timing-driven global routing with efficient buffer insertion. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2005, pp:2449-2452 [Conf]
   
5. Ling Zhang, Tong Jing, Xianlong Hong, Jingyu Xu, Jinjun Xiong, Lei He
   Performance and RLC crosstalk driven global routing. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2004, pp:65-68 [Conf]
   
6. Tong Jing, Xianlong Hong, Haiyun Bao, Yici Cai, Jingyu Xu, Jun Gu
   A novel and efficient timing-driven global router for standard cell layout design based on critical network concept. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2002, pp:165-168 [Conf]
   
7. Jingyu Xu, Xianlong Hong, Tong Jing, Yang Yang
   Obstacle-Avoiding Rectilinear Minimum-Delay Steiner Tree Construction towards IP-Block-Based SOC Design. [Citation Graph (0, 0)][DBLP]
   ISQED, 2005, pp:616-621 [Conf]
   
8. Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu
   An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2002, pp:473-478 [Conf]
   
9. Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu
   An efficient hierarchical timing-driven Steiner tree algorithm for global routing. [Citation Graph (0, 0)][DBLP]
   Integration, 2003, v:35, n:2, pp:69-84 [Journal]
   
10. Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu
    A coupling and crosstalk-considered timing-driven global routing algorithm for high-performance circuit design. [Citation Graph (0, 0)][DBLP]
    Integration, 2006, v:39, n:4, pp:457-473 [Journal]
    
11. Xianlong Hong, Tong Jing, Jingyu Xu, Haiyun Bao, Gu Jun
    CNB: A Critical-Network-Based Timing Optimization Method for Standard Cell Global Routing. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2003, v:18, n:6, pp:732-738 [Journal]
    
12. Tong Jing, Xianlong Hong, Haiyun Bao, Jingyu Xu, Gu Jun
    SSTT: Efficient Local Search for GSI Global Routing. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2003, v:18, n:5, pp:632-640 [Journal]
    
13. Tong Jing, Xianlong Hong, Jingyu Xu, Haiyun Bao, Chung-Kuan Cheng, Jun Gu
    UTACO: a unified timing and congestion optimization algorithm for standard cell global routing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:3, pp:358-365 [Journal]
    
14. 
    Accurate detection for process-hotspots with vias and incomplete specification. [Citation Graph (, )][DBLP]