Journals in DBLP

J. Electronic Testing
2005, volume: 21, number: 5

1. Vishwani D. Agrawal
   Editorial. [Citation Graph (0, 0)][DBLP]
   J. Electronic Testing, 2005, v:21, n:5, pp:459- [Journal]
   
2. Bruce C. Kim
   The Newsletter of Test Technology Council of the IEEE Computer Society. [Citation Graph (0, 0)][DBLP]
   J. Electronic Testing, 2005, v:21, n:5, pp:461-462 [Journal]
   
3. Chintan Patel, Abhishek Singh, Jim Plusquellic
   Defect Detection Using Quiescent Signal Analysis. [Citation Graph (0, 0)][DBLP]
   J. Electronic Testing, 2005, v:21, n:5, pp:463-483 [Journal]
   
4. Andreas G. Veneris, Jiang Brandon Liu
   Incremental Design Debugging in a Logic Synthesis Environment. [Citation Graph (0, 0)][DBLP]
   J. Electronic Testing, 2005, v:21, n:5, pp:485-494 [Journal]
   
5. Andreas G. Veneris, Robert Chang, Magdy S. Abadir, Sep Seyedi
   Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG. [Citation Graph (0, 0)][DBLP]
   J. Electronic Testing, 2005, v:21, n:5, pp:495-502 [Journal]
   
6. Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra
   A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation. [Citation Graph (0, 0)][DBLP]
   J. Electronic Testing, 2005, v:21, n:5, pp:503-537 [Journal]
   
7. Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin
   Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2^m). [Citation Graph (0, 0)][DBLP]
   J. Electronic Testing, 2005, v:21, n:5, pp:539-549 [Journal]
   
8. Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Simone Borri, Magali Bastian Hage-Hassan
   Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories. [Citation Graph (0, 0)][DBLP]
   J. Electronic Testing, 2005, v:21, n:5, pp:551-561 [Journal]