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Donald Yeung :
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Gautham K. Dorai , Donald Yeung Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:30-0 [Conf ] Nicholas Kohout , Seungryul Choi , Dongkeun Kim , Donald Yeung Multi-Chain Prefetching: Effective Exploitation of Inter-Chain Memory Parallelism for Pointer-Chasing Codes. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2001, pp:268-279 [Conf ] Dongkeun Kim , Donald Yeung Design and evaluation of compiler algorithms for pre-execution. [Citation Graph (0, 0)][DBLP ] ASPLOS, 2002, pp:159-170 [Conf ] Dongkeun Kim , Shih-wei Liao , Perry H. Wang , Juan del Cuvillo , Xinmin Tian , Xiang Zou , Hong Wang , Donald Yeung , Milind Girkar , John Paul Shen Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors. [Citation Graph (0, 0)][DBLP ] CGO, 2004, pp:27-38 [Conf ] Csaba Andras Moritz , Donald Yeung , Anant Agarwal Exploring Optimal Cost-Performance Designs for Raw Microprocessors. [Citation Graph (0, 0)][DBLP ] FCCM, 1998, pp:12-27 [Conf ] Abdel-Hameed A. Badawy , Aneesh Aggarwal , Donald Yeung , Chau-Wen Tseng Evaluating the impact of memory system performance on software prefetching and locality optimizations. [Citation Graph (0, 0)][DBLP ] ICS, 2001, pp:486-500 [Conf ] Donald Yeung The scalability of multigrain systems. [Citation Graph (0, 0)][DBLP ] International Conference on Supercomputing, 1999, pp:268-277 [Conf ] Anant Agarwal , Ricardo Bianchini , David Chaiken , Kirk L. Johnson , David A. Kranz , John Kubiatowicz , Beng-Hong Lim , Kenneth Mackenzie , Donald Yeung The MIT Alewife Machine: Architecture and Performance. [Citation Graph (0, 0)][DBLP ] ISCA, 1995, pp:2-13 [Conf ] Seungryul Choi , Donald Yeung Learning-Based SMT Processor Resource Distribution via Hill-Climbing. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:239-251 [Conf ] Donald Yeung , John Kubiatowicz , Anant Agarwal MGS: A Multigrain Shared Memory System. [Citation Graph (0, 0)][DBLP ] ISCA, 1996, pp:44-55 [Conf ] Deepak N. Agarwal , Sumitkumar N. Pamnani , Gang Qu , Donald Yeung Transferring performance gain from software prefetching to energy reduction. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2004, pp:241-244 [Conf ] Donald Yeung , Anant Agarwal Experience with Fine-Grain Synchronization in MIMD Machines for Preconditioned Conjugate Gradient. [Citation Graph (0, 0)][DBLP ] PPOPP, 1993, pp:187-197 [Conf ] Anant Agarwal , Jonathan Babb , David Chaiken , Godfrey D'Souza , Kirk L. Johnson , David A. Kranz , John Kubiatowicz , Beng-Hong Lim , Gino Maa , Ken Mackenzie , Daniel Nussbaum , Mike Parkin , Donald Yeung Sparcle: A Multithreaded VLSI Processor for Parallel Computing. [Citation Graph (0, 0)][DBLP ] Parallel Symbolic Computing, 1992, pp:359-361 [Conf ] Abdel-Hameed A. Badawy , Aneesh Aggarwal , Donald Yeung , Chau-Wen Tseng The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems. [Citation Graph (0, 0)][DBLP ] J. Instruction-Level Parallelism, 2004, v:6, n:, pp:- [Journal ] Gautham Thambidorai , Donald Yeung , Seungryul Choi Optimizing SMT Processors for High Single-Thread Performance. [Citation Graph (0, 0)][DBLP ] J. Instruction-Level Parallelism, 2003, v:5, n:, pp:- [Journal ] Seungryul Choi , Nicholas Kohout , Sumit Pamnani , Dongkeun Kim , Donald Yeung A general framework for prefetch scheduling in linked data structures and its application to multi-chain prefetching. [Citation Graph (0, 0)][DBLP ] ACM Trans. Comput. Syst., 2004, v:22, n:2, pp:214-280 [Journal ] Dongkeun Kim , Donald Yeung A study of source-level compiler algorithms for automatic construction of pre-execution code. [Citation Graph (0, 0)][DBLP ] ACM Trans. Comput. Syst., 2004, v:22, n:3, pp:326-379 [Journal ] Donald Yeung , John Kubiatowicz , Anant Agarwal Multigrain shared memory. [Citation Graph (0, 0)][DBLP ] ACM Trans. Comput. Syst., 2000, v:18, n:2, pp:154-196 [Journal ] Csaba Andras Moritz , Donald Yeung , Anant Agarwal SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 2001, v:12, n:7, pp:730-742 [Journal ] Using Aggressor Thread Information to Improve Shared Cache Management for CMPs. [Citation Graph (, )][DBLP ] Application-Level Correctness and its Impact on Fault Tolerance. [Citation Graph (, )][DBLP ] BioBench: A Benchmark Suite of Bioinformatics Applications. [Citation Graph (, )][DBLP ] Search in 0.053secs, Finished in 0.055secs