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Conferences in DBLP

Symposium on Code Generation and Optimization (cgo)
2004 (conf/cgo/2004)

  1. Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney
    Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:15-26 [Conf]
  2. Dongkeun Kim, Shih-wei Liao, Perry H. Wang, Juan del Cuvillo, Xinmin Tian, Xiang Zou, Hong Wang, Donald Yeung, Milind Girkar, John Paul Shen
    Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:27-38 [Conf]
  3. Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry
    Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:39-52 [Conf]
  4. Michael Dupré, Nathalie Drach, Olivier Temam
    VHC: Quickly Building an Optimizer for Complex Embedded Architectures. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:53-64 [Conf]
  5. Sungdo Moon, Xinliang D. Li, Robert Hundt, Dhruva R. Chakrabarti, Luis A. Lozano, Uma Srinivasan, Shin-Ming Liu
    SYZYGY - A Framework for Scalable Cross-Module IPO. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:65-74 [Conf]
  6. Chris Lattner, Vikram S. Adve
    LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:75-88 [Conf]
  7. Kim M. Hazelwood, James E. Smith
    Exploring Code Cache Eviction Granularities in Dynamic Optimization Systems. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:89-99 [Conf]
  8. Ali-Reza Adl-Tabatabai, Jay Bharadwaj, Michal Cierniak, Marsha Eng, Jesse Fang, Brian T. Lewis, Brian R. Murphy, James M. Stichnoth
    Improving 64-Bit Java IPF Performance by Compressing Heap References. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:100-110 [Conf]
  9. Xiaoming Li, María Jesús Garzarán, David A. Padua
    A Dynamically Tuned Sorting Library. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:111-124 [Conf]
  10. Ramon Canal, Antonio González, James E. Smith
    Software-Controlled Operand-Gating. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:125-136 [Conf]
  11. Yoav Almog, Roni Rosner, Naftali Schwartz, Ari Schmorak
    Specialized Dynamic Optimizations for High-Performance Energy-Efficient Microarchitecture. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:137-150 [Conf]
  12. Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson
    Probabilistic Predicate-Aware Modulo Scheduling. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:151-162 [Conf]
  13. Hongbo Rong, Zhizhong Tang, Ramaswamy Govindarajan, Alban Douillet, Guang R. Gao
    Single-Dimension Software Pipelining for Multi-Dimensional Loops. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:163-174 [Conf]
  14. Hongbo Rong, Alban Douillet, Ramaswamy Govindarajan, Guang R. Gao
    Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:175-188 [Conf]
  15. Sebastian Winkel
    Exploring the Performance Potential of Itanium® Processors with ILP-based Scheduling. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:189-200 [Conf]
  16. Manjunath Kudlur, Kevin Fan, Michael L. Chu, Rajiv A. Ravindran, Nathan Clark, Scott A. Mahlke
    FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:201-212 [Conf]
  17. Shiliang Hu, James E. Smith
    Using Dynamic Binary Translation to Fuse Dependent Instructions. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:213-226 [Conf]
  18. Youfeng Wu, Mauricio Breternitz Jr., Justin Quek, Orna Etzion, Jesse Fang
    The Accuracy of Initial Prediction in Two-Phase Dynamic Binary Translators. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:227-238 [Conf]
  19. Rahul Joshi, Michael D. Bond, Craig B. Zilles
    Targeted Path Profiling: Lower Overhead Path Profiling for Staged Dynamic Optimization Systems. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:239-250 [Conf]
  20. Sriraman Tallam, Xiangyu Zhang, Rajiv Gupta
    Extending Path Profiling across Loop Backedges and Procedure Boundaries. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:251-264 [Conf]
  21. Fabrice Rastello, François de Ferrière, Christophe Guillon
    Optimizing Translation Out of SSA Using Renaming Constraints. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:265-278 [Conf]
  22. Yonghua Ding, Zhiyuan Li
    A Compiler Scheme for Reusing Intermediate Computation Results. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:279-290 [Conf]
  23. Byoungro So, Mary W. Hall, Heidi E. Ziegler
    Custom Data Layout for Memory Parallelism. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:291-302 [Conf]
  24. Vlad-Mihai Panait, Amit Sasturkar, Weng-Fai Wong
    Static Identification of Delinquent Loads. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:303-314 [Conf]
  25. Qiang Wu, Artem Pyatakov, Alexey Spiridonov, Easwaran Raman, Douglas W. Clark, David I. August
    Exposing Memory Access Regularities Using Object-Relative Memory Profiling. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:315-324 [Conf]
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