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Juha-Pekka Soininen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Juha-Pekka Soininen, Jari Kreku, Yang Qu, Martti Forsell
    Fast processor core selection for WLAN modem using mappability estimation. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:61-66 [Conf]
  2. Yang Qu, Juha-Pekka Soininen, Jari Nurmi
    A parallel configuration model for reducing the run-time reconfiguration overhead. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:965-969 [Conf]
  3. Juha-Pekka Soininen, Jari Kreku, Yang Qu
    Mappability Estimation of Architecture and Algorithm. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:1132- [Conf]
  4. Yang Qu, Juha-Pekka Soininen
    Estimating the Utilization of Embedded FPGA Co-Processor. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:214-221 [Conf]
  5. Jari Kreku, Jani Penttilä, Janne Kangas, Juha-Pekka Soininen
    Workload Simulation Method for Evaluation of Application Feasibility in a Mobile Multiprocessor Platform. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:532-539 [Conf]
  6. Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen
    SystemC-based Design Methodology for Reconfigurable System-on-Chip. [Citation Graph (0, 0)][DBLP]
    DSD, 2005, pp:364-371 [Conf]
  7. Juha-Pekka Soininen, Sandrine Boumard, Tommi Salminen, Hannu Heusala
    Application of Decision-Making Method for Architecture Selection of ADSL Modem. [Citation Graph (0, 0)][DBLP]
    DSD, 2001, pp:21-29 [Conf]
  8. Juha-Pekka Soininen, Antti Pelkonen, Jussi Roivainen
    Configurable Memory Organisation for Communication Applications. [Citation Graph (0, 0)][DBLP]
    DSD, 2002, pp:86-93 [Conf]
  9. Yang Qu, Juha-Pekka Soininen, Jari Nurmi
    An Efficient Approach to Hide the Run-Time Reconfiguration from SW Applications. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:648-653 [Conf]
  10. Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnny Öberg, Juha-Pekka Soininen, Martti Forsell, Kari Tiensyrjä, Ahmed Hemani
    A Network on Chip Architecture and Design Methodology. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2002, pp:117-124 [Conf]
  11. Juha-Pekka Soininen, Axel Jantsch, Martti Forsell, Antti Pelkonen, Jari Kreku, Shashi Kumar
    Extending Platform-Based Design to Network on Chip Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:401-0 [Conf]
  12. Yang Qu, Juha-Pekka Soininen, Jari Nurmi
    Interactive presentation: Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:147-152 [Conf]
  13. Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen, Jari Nurmi
    System-Level Design for Partially Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2738-2741 [Conf]
  14. Yang Qu, Juha-Pekka Soininen, Jari Nurmi
    A Genetic Algorithm for Scheduling Tasks onto Dynamically Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:161-164 [Conf]
  15. Yang Qu, Juha-Pekka Soininen, Jari Nurmi
    Static scheduling techniques for dependent tasks on dynamically reconfigurable devices. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:11, pp:861-876 [Journal]

  16. Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking. [Citation Graph (, )][DBLP]

  17. Cosimulation of real-time control systems. [Citation Graph (, )][DBLP]

  18. Virtual Prototypes in Developing Mobile Software Applications and Devices. [Citation Graph (, )][DBLP]

  19. Application - Platform Performance Modeling and Evaluation. [Citation Graph (, )][DBLP]

  20. Layered UML Workload and SystemC Platform Models. [Citation Graph (, )][DBLP]

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