Journals in DBLP

ACM Trans. Design Autom. Electr. Syst.
2005, volume: 10, number: 2

1. Noureddine Chabini, El Mostapha Aboulhamid, Ismaïl Chabini, Yvon Savaria
   Scheduling and optimal register placement for synchronous circuits derived using software pipelining techniques. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:187-204 [Journal]
   
2. Aiqun Cao, Naran Sirisantana, Cheng-Kok Koh, Kaushik Roy
   Synthesis of skewed logic circuits. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:205-228 [Journal]
   
3. Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. Kandemir, Gokul B. Kandiraju, Guangyu Chen
   Optimizing instruction TLB energy using software and hardware techniques. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:229-257 [Journal]
   
4. Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
   Efficient techniques for transition testing. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:258-278 [Journal]
   
5. Kara K. W. Poon, Steven J. E. Wilton, Andy Yan
   A detailed power model for field-programmable gate arrays. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:279-302 [Journal]
   
6. Soumendu Bhattacharya, Abhijit Chatterjee
   Optimized wafer-probe and assembled package test design for analog circuits. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:303-329 [Journal]
   
7. Saraju P. Mohanty, N. Ranganathan
   Energy-efficient datapath scheduling using multiple voltages and dynamic clocking. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:330-353 [Journal]
   
8. Azadeh Davoodi, Ankur Srivastava
   Voltage scheduling under unpredictabilities: a risk management paradigm. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:354-368 [Journal]
   
9. Zhong Wang, Xiaobo Sharon Hu
   Energy-aware variable partitioning and instruction scheduling for multibank memory architectures. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:369-388 [Journal]
   
10. Jason Cong, Joseph R. Shinnerl, Min Xie, Tim Kong, Xin Yuan
    Large-scale circuit placement. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:389-430 [Journal]