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Yukiya Miura: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Masaki Hashizume, Yukiya Miura, Masahiro Ichimiya, Takeomi Tamesada, Kozo Kinoshita
    A High-Speed IDDQ Sensor for Low-Voltage ICs. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1998, pp:327-0 [Conf]
  2. Masaki Hashizume, Teppei Takeda, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura, Kozo Kinoshita
    A BIST Circuit for IDDQ Tests. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:390-395 [Conf]
  3. Arabi Keshk, Kozo Kinoshita, Yukiya Miura
    Procedure to Overcome the Byzantine General's Problem for Bridging Faults in CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:121-126 [Conf]
  4. Arabi Keshk, Kozo Kinoshita, Yukiya Miura
    IDDQ Current Dependency on Test Vectors and Bridging Resistance. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:158-163 [Conf]
  5. Arabi Keshk, Yukiya Miura, Kozo Kinoshita
    Simulation of resistive bridging fault to minimize the presence of intermediate voltage and oscillation in CMOS circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2000, pp:120-124 [Conf]
  6. Teppei Takeda, Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Yukiya Miura, Kozo Kinoshita
    IDDQ Sensing Technique for High Speed IDDQ Testing. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2001, pp:111-116 [Conf]
  7. Masaki Hashizume, Tomomi Nishida, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura
    Current Testable Design of Resistor String DACs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:197-200 [Conf]
  8. Yukiya Miura
    Fault Diagnosis of Analog Circuits by Operation-Region Model and X-Y Zoning Method. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:230-238 [Conf]
  9. Yukiya Miura
    Characteristics of Fault Diagnosis for Analog Circuits Based on Preset Test. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:573-581 [Conf]
  10. Yukiya Miura, Daisuke Kato
    Analysis and Testing of Analog and Mixed-Signal Circuits by an Operation-Region Model: A Case Study of Application and Implementation. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:279-286 [Conf]
  11. Yukiya Miura, Jiro Kato
    Fault Diagnosis of Analog Circuits Based on Adaptive Test and Output Characteristics. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:410-418 [Conf]
  12. Yukiya Miura, Sachio Naito, Kozo Kinoshita
    A Case Study of Mixed-Signal Integrated Circuit Testing: An Application of Current Testing Using the Upper Limit and the Lower Limit. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:77-80 [Conf]
  13. Yukiya Miura
    A Comparative Analysis of Input Stimuli for Testing Mixed-Signal LSIs Based on Curent Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1995, pp:71-77 [Conf]
  14. Yukiya Miura
    An IDDQ Sensor Circuit for Low-Voltage ICs. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:938-947 [Conf]
  15. Yukiya Miura, Kozo Kinoshita
    Circuit Design for Built-in Current Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:873-881 [Conf]
  16. Yukiya Miura
    Real-Time Current Testing for A/D Converters. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1996, v:13, n:2, pp:34-41 [Journal]
  17. Yukiya Miura
    Proposal of Fault Diagnosis of Analog Circuits by Combining Operation-Region Model and X-Y Zoning Method: Case Study. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2006, v:22, n:4-6, pp:411-423 [Journal]

  18. Diagnosis of Analog Circuits by Using Multiple Transistors and Data Sampling. [Citation Graph (, )][DBLP]


  19. On estimation of NBTI-Induced delay degradation. [Citation Graph (, )][DBLP]


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