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Takeomi Tamesada: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
CMOS Open Defect Detection Based on Supply Current in Time-Variable Electric Field and Supply Voltage Application. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 2001, pp:117-122 [Conf] - Masaki Hashizume, Toshimasa Kuchii, Takeomi Tamesada
Supply Current Test for Unit-to-unit Variations of Electrical Characteristics in Gates. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 1997, pp:372-377 [Conf] - Masaki Hashizume, Yukiya Miura, Masahiro Ichimiya, Takeomi Tamesada, Kozo Kinoshita
A High-Speed IDDQ Sensor for Low-Voltage ICs. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 1998, pp:327-0 [Conf] - Masaki Hashizume, Teppei Takeda, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura, Kozo Kinoshita
A BIST Circuit for IDDQ Tests. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 2003, pp:390-395 [Conf] - Masaki Hashizume, Hiroyuki Yotsuyanagi, Masahiro Ichimiya, Takeomi Tamesada, Masashi Takeda
High speed IDDQ test and its testability for process variation. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 2000, pp:344-349 [Conf] - Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
Identification of Feedback Bridging Faults with Oscillation. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 1999, pp:25-0 [Conf] - Masaki Hashizume, Daisuke Yoneda, Hiroyuki Yotsuyanagi, Tetsuo Tada, Takeshi Koyama, Ikuro Morita, Takeomi Tamesada
I_DDQ Test Method Based on Wavelet Transformation for Noisy Current Measurement Environment. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 2004, pp:112-117 [Conf] - Toshimasa Kuchii, Masaki Hashizume, Takeomi Tamesada
Algorithmic Test Generation for Supply Current Testing of TTL Combinational Circuits. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 1996, pp:171-176 [Conf] - Hiroyuki Yotsuyanagi, Shinsuke Hata, Masaki Hashizume, Takeomi Tamesada
Sequential Redundancy Removal Using Test Generation and Multiple Unreachable States. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 2001, pp:23-0 [Conf] - Hiroyuki Yotsuyanagi, Masaki Hashizume, Takeomi Tamesada
Test Time Reduction for I DDQ Testing by Arranging Test Vectors. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 2002, pp:423-428 [Conf] - Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
CMOS open defect detection by supply current test. [Citation Graph (0, 0)][DBLP]
DATE, 2001, pp:509- [Conf] - Masaki Hashizume, Tetsuo Akita, Hiroyuki Yotsuyanagi, Takeomi Tamesada
CMOS Open Fault Detection by Appearance Time of Switching Supply Current. [Citation Graph (0, 0)][DBLP]
DELTA, 2004, pp:183-188 [Conf] - Masaki Hashizume, Tomomi Nishida, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura
Current Testable Design of Resistor String DACs. [Citation Graph (0, 0)][DBLP]
DELTA, 2006, pp:197-200 [Conf] - Masaki Hashizume, Masashi Sato, Hiroyuki Yotsuyanagi, Takeomi Tamesada
Power Supply Circuit for High Speed Operation of Adiabatic Dynamic CMOS Logic Circuits. [Citation Graph (0, 0)][DBLP]
DELTA, 2002, pp:459-461 [Conf] - Daisuke Ezaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits. [Citation Graph (0, 0)][DBLP]
DELTA, 2004, pp:306-311 [Conf] - Isao Tsukimoto, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
Practical Fault Coverage of Supply Current Tests for Bipolar ICs. [Citation Graph (0, 0)][DBLP]
DELTA, 2004, pp:189-194 [Conf] - Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada
Random Pattern Testability of the Open Defect Detection Method using Application of Time-variable Electric Field. [Citation Graph (0, 0)][DBLP]
DELTA, 2002, pp:387-391 [Conf] - Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Masashi Takeda
Testability Analysis of IDDQ Testing with Large Threshold Value. [Citation Graph (0, 0)][DBLP]
DFT, 2000, pp:367-375 [Conf] - Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada
Test Pattern for Supply Current Test of Open Defects by Applying Time-Variable Electric Field. [Citation Graph (0, 0)][DBLP]
DFT, 2001, pp:287-0 [Conf] - Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
Electric field for detecting open leads in CMOS logic circuits by supply current testing. [Citation Graph (0, 0)][DBLP]
ISCAS (3), 2005, pp:2995-2998 [Conf] - Masaki Hashizume, Takeomi Tamesada, Akio Sakamoto
A Maximum Clique Derivation Algorithm for Simplification of Incompletely Specified Machines. [Citation Graph (0, 0)][DBLP]
ISCAS, 1994, pp:193-196 [Conf] - Masaki Hashizume, Takeomi Tamesada, Kazuhiro Yamada, Masaaki Kawakami
Fault Detection of Combinational Circuits Based on Supply Current. [Citation Graph (0, 0)][DBLP]
ITC, 1988, pp:374-380 [Conf] - Masahiro Ichimiya, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
A test circuit for pin shorts generating oscillation in CMOS logic circuits. [Citation Graph (0, 0)][DBLP]
Systems and Computers in Japan, 2004, v:35, n:13, pp:10-20 [Journal] - Takeomi Tamesada
Sequential Machines Having Quasi-Stable States. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 1980, v:29, n:5, pp:405-408 [Journal]
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