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Milagros Fernández:
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Publications of Author
- F. Rivera, Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Nader Bagherzadeh
Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures. [Citation Graph (0, 0)][DBLP] CODES+ISSS, 2004, pp:30-35 [Conf]
- Haitao Du, Marcos Sanchez-Elez, Nozar Tabrizi, Nader Bagherzadeh, Manuel L. Anido, Milagros Fernández
Interactive Ray Tracing on Reconfigurable SIMD MorphoSys. [Citation Graph (0, 0)][DBLP] DATE, 2003, pp:20144-20149 [Conf]
- Rafael Maestre, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh, Román Hermida, Milagros Fernández
Kernel Scheduling in Reconfigurable Computing. [Citation Graph (0, 0)][DBLP] DATE, 1999, pp:90-96 [Conf]
- Marcos Sanchez-Elez, Milagros Fernández, Manuel L. Anido, Haitao Du, Nader Bagherzadeh, Román Hermida
Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP] DATE, 2003, pp:10036-10043 [Conf]
- Marcos Sanchez-Elez, Milagros Fernández, Rafael Maestre, Fadi J. Kurdahi, Román Hermida, Nader Bagherzadeh
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP] DATE, 2002, pp:547-552 [Conf]
- F. Rivera, Milagros Fernández, Nader Bagherzadeh
An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP] DSD, 2005, pp:396-402 [Conf]
- Rafael Maestre, Milagros Fernández, Román Hermida, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP] FCCM, 2000, pp:297-298 [Conf]
- Rafael Maestre, Milagros Fernández, Román Hermida, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP] ICCD, 2000, pp:575-576 [Conf]
- F. Rivera, Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Nader Bagherzadeh
Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP] IPDPS, 2005, pp:- [Conf]
- Rafael Maestre, Milagros Fernández, Román Hermida, Nader Bagherzadeh
A Framework for Scheduling and Context Allocation in Reconfigurable Computing. [Citation Graph (0, 0)][DBLP] ISSS, 1999, pp:134-140 [Conf]
- Rafael Maestre, Fadi J. Kurdahi, Milagros Fernández, Nader Bagherzadeh, Hartej Singh
Configuration Management in Multi-Context Reconfigurable Systems for Simultaneous Performance and Power Optimization. [Citation Graph (0, 0)][DBLP] ISSS, 2000, pp:107-114 [Conf]
- Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Rafael Maestre, Fadi J. Kurdahi, Nader Bagherzadeh
A data scheduler for multi-context reconfigurable architectures. [Citation Graph (0, 0)][DBLP] ISSS, 2001, pp:177-182 [Conf]
- Hortensia Mecha, Milagros Fernández
Interconnection Delay and Clock Cycle Selection in High Level Synthesis. [Citation Graph (0, 0)][DBLP] VLSI Design, 1997, pp:504-505 [Conf]
- José M. Mendías, Román Hermida, Milagros Fernández
Formal Techniques for Hardware Allocation. [Citation Graph (0, 0)][DBLP] VLSI Design, 1997, pp:161-165 [Conf]
- Marcos Sanchez-Elez, Haitao Du, Nozar Tabrizi, Yun Long, Nader Bagherzadeh, Milagros Fernández
Algorithm optimizations and mapping scheme for interactive ray tracing on a reconfigurable architecture. [Citation Graph (0, 0)][DBLP] Computers & Graphics, 2003, v:27, n:5, pp:701-713 [Journal]
- R. Moreno, Román Hermida, Milagros Fernández, Hortensia Mecha
A unified approach for scheduling and allocation. [Citation Graph (0, 0)][DBLP] Integration, 1997, v:23, n:1, pp:1-35 [Journal]
- Hortensia Mecha, Milagros Fernández, Francisco Tirado, Julio Septién, D. Motes, Katzalin Olcoz
A method for area estimation of data-path in high level synthesis. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:2, pp:258-265 [Journal]
- R. Moreno, Román Hermida, Milagros Fernández
Register estimation in unscheduled dataflow graphs. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 1996, v:1, n:3, pp:396-403 [Journal]
- F. Rivera, Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Nader Bagherzadeh
Configuration Scheduling for Conditional Branch Execution Onto Multi-Context Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP] FPL, 2006, pp:1-8 [Conf]
- Rafael Maestre, F. Kurdahl, Milagros Fernández, Román Hermida, Nader Bagherzadeh, Hartej Singh
A formal approach to context scheduling for multicontext reconfigurable architectures. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2001, v:9, n:1, pp:173-185 [Journal]
- Rafael Maestre, Fadi J. Kurdahi, Milagros Fernández, Román Hermida, Nader Bagherzadeh, Hartej Singh
A framework for reconfigurable computing: task scheduling and context management. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2001, v:9, n:6, pp:858-873 [Journal]
Mining conceptual graphs for knowledge acquisition. [Citation Graph (, )][DBLP]
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