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John W. Lockwood :
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Edson L. Horta , John W. Lockwood , David E. Taylor , David Parlour Dynamic hardware plugins in an FPGA with partial run-time reconfiguration. [Citation Graph (0, 0)][DBLP ] DAC, 2002, pp:343-348 [Conf ] Fred Kuhns , John D. DeHart , Anshul Kantawala , Ralph Keller , John W. Lockwood , Prashanth Pappu , David Richard , David E. Taylor , Jyoti Parwatikar , Ed Spitznagel , Jonathan S. Turner , Ken Wong Design and Evaluation of a High Performance Dynamically Extensible Router. [Citation Graph (0, 0)][DBLP ] DANCE, 2002, pp:42-64 [Conf ] John W. Lockwood Evolvable Internet Hardware Platforms. [Citation Graph (0, 0)][DBLP ] Evolvable Hardware, 2001, pp:271-279 [Conf ] Michael Attig , Sarang Dharmapurikar , John W. Lockwood Implementation Results of Bloom Filters for String Matching. [Citation Graph (0, 0)][DBLP ] FCCM, 2004, pp:322-323 [Conf ] Michael Attig , John W. Lockwood A Framework for Rule Processing in Reconfigurable Network Systems. [Citation Graph (0, 0)][DBLP ] FCCM, 2005, pp:225-234 [Conf ] James Moscola , John W. Lockwood , Ronald Prescott Loui , Michael Pachos Implementation of a Content-Scanning Module for an Internet Firewall. [Citation Graph (0, 0)][DBLP ] FCCM, 2003, pp:31-38 [Conf ] Todd S. Sproull , John W. Lockwood , David E. Taylor Control and Configuration Software for a Reconfigurable Networking Hardware Platform. [Citation Graph (0, 0)][DBLP ] FCCM, 2002, pp:45-0 [Conf ] Haoyu Song , Jing Lu , John W. Lockwood , James Moscola Secure Remote Control of Field-programmable Network Devices. [Citation Graph (0, 0)][DBLP ] FCCM, 2004, pp:334-335 [Conf ] Shobana Padmanabhan , Moshe Looks , Dan Legorreta , Young Cho , John W. Lockwood Hierarchical Clustering using Reconfigurable Devices. [Citation Graph (0, 0)][DBLP ] FCCM, 2006, pp:327-328 [Conf ] James Moscola , Young H. Cho , John W. Lockwood A Scalable Hybrid Regular Expression Pattern Matcher. [Citation Graph (0, 0)][DBLP ] FCCM, 2006, pp:337-338 [Conf ] Michael Attig , John W. Lockwood A framework for rule processing in reconfigurable network systems (abstract only). [Citation Graph (0, 0)][DBLP ] FPGA, 2005, pp:277- [Conf ] Young H. Cho , James Moscola , John W. Lockwood Context-free-grammar based token tagger in reconfigurable devices. [Citation Graph (0, 0)][DBLP ] FPGA, 2006, pp:237- [Conf ] John W. Lockwood , Naji Naufel , Jonathan S. Turner , David E. Taylor Reprogrammable network packet processing on the field programmable port extender (FPX). [Citation Graph (0, 0)][DBLP ] FPGA, 2001, pp:87-93 [Conf ] John W. Lockwood , Jonathan S. Turner , David E. Taylor Field programmable port extender (FPX) for distributed routing and queuing. [Citation Graph (0, 0)][DBLP ] FPGA, 2000, pp:137-144 [Conf ] Haoyu Song , John W. Lockwood Efficient packet classification for network intrusion detection using FPGA. [Citation Graph (0, 0)][DBLP ] FPGA, 2005, pp:238-245 [Conf ] Florian Braun , John W. Lockwood , Marcel Waldvogel Reconfigurable Router Modules Using Network Protocol Wrappers. [Citation Graph (0, 0)][DBLP ] FPL, 2001, pp:254-263 [Conf ] Edson L. Horta , John W. Lockwood Automated Method to Generate Bitstream Intellectual Property Cores for Virtex FPGAs. [Citation Graph (0, 0)][DBLP ] FPL, 2004, pp:975-979 [Conf ] Edson L. Horta , John W. Lockwood , Sergio Takeo Kofuji Using PARBIT to Implement Partial Run-Time Reconfigurable Systems. [Citation Graph (0, 0)][DBLP ] FPL, 2002, pp:182-191 [Conf ] Charles M. Kastner , G. Adam Covington , Andrew A. Levine , John W. Lockwood HAIL: A Hardware-Accelerated Algorithm for Language Identification. [Citation Graph (0, 0)][DBLP ] FPL, 2005, pp:499-504 [Conf ] John W. Lockwood , Christopher E. Neely , Christopher K. Zuver , James Moscola , Sarang Dharmapurikar , David Lim An Extensible, System-On-Programmable-Chip, Content-Aware Internet Firewall. [Citation Graph (0, 0)][DBLP ] FPL, 2003, pp:859-868 [Conf ] David V. Schuehler , Harvey Ku , John W. Lockwood A TCP/IP Based Multi-device Programming Circuit. [Citation Graph (0, 0)][DBLP ] FPL, 2003, pp:968-971 [Conf ] David V. Schuehler , John W. Lockwood A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks. [Citation Graph (0, 0)][DBLP ] FPL, 2004, pp:301-310 [Conf ] Haoyu Song , Todd S. Sproull , Michael Attig , John W. Lockwood Snort Offloader: A Reconfigurable Hardware NIDS Filter. [Citation Graph (0, 0)][DBLP ] FPL, 2005, pp:493-498 [Conf ] Michael Attig , John W. Lockwood SIFT: Snort Intrusion Filter for TCP. [Citation Graph (0, 0)][DBLP ] Hot Interconnects, 2005, pp:121-127 [Conf ] Young H. Cho , James Moscola , John W. Lockwood Context-Free-Grammar based Token Tagger in Reconfigurable Devices. [Citation Graph (0, 0)][DBLP ] ICDE Workshops, 2006, pp:78- [Conf ] Haoyu Song , Jonathan S. Turner , John W. Lockwood Shape Shifting Tries for Faster IP Route Lookup. [Citation Graph (0, 0)][DBLP ] ICNP, 2005, pp:358-367 [Conf ] Haoran Duan , John W. Lockwood , Sung-Mo Kang , J. D. Will A High-Performance OC-12/OC-48 Queue Design Prototype for Input-buffered ATM Switches. [Citation Graph (0, 0)][DBLP ] INFOCOM, 1997, pp:20-28 [Conf ] David E. Taylor , John W. Lockwood , Todd S. Sproull , Jonathan S. Turner , David Parlour Scalable IP Lookup for Programmable Routers. [Citation Graph (0, 0)][DBLP ] INFOCOM, 2002, pp:- [Conf ] Phillip Jones , Shobana Padmanabhan , Daniel Rymarz , John Maschmeyer , David V. Schuehler , John W. Lockwood , Ron Cytron Liquid Architecture. [Citation Graph (0, 0)][DBLP ] IPDPS Next Generation Software Program - NSFNGS - PI Workshop, 2004, pp:- [Conf ] Jing Lu , John W. Lockwood IPSec Implementation on Xilinx Virtex-II Pro FPGA and Its Application. [Citation Graph (0, 0)][DBLP ] IPDPS, 2005, pp:- [Conf ] James Moscola , Young H. Cho , John W. Lockwood Reconfigurable context-free grammar based data processing hardware with error recovery. [Citation Graph (0, 0)][DBLP ] IPDPS, 2006, pp:- [Conf ] Shobana Padmanabhan , Ron K. Cytron , Roger D. Chamberlain , John W. Lockwood Automatic application-specific microarchitecture reconfiguration. [Citation Graph (0, 0)][DBLP ] IPDPS, 2006, pp:- [Conf ] Roger D. Chamberlain , Ron K. Cytron , Jason E. Fritts , John W. Lockwood Vision for liquid architecture. [Citation Graph (0, 0)][DBLP ] IPDPS, 2006, pp:- [Conf ] John W. Lockwood , James Moscola , David Reddick , Matthew Kulig , Tim Brooks Application of Hardware Accelerated Extensible Network Nodes for Internet Worm and Virus Protection. [Citation Graph (0, 0)][DBLP ] IWAN, 2003, pp:44-57 [Conf ] Roger D. Chamberlain , John W. Lockwood , Saurabh Gayen , Richard Hough , Phillip Jones Use of a Soft-Core Processor in a Hardware/Software Codesign Laboratory. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:97-98 [Conf ] David Lim , Christopher E. Neely , Christopher K. Zuver , John W. Lockwood Internet-based Tool for System-on-Chip Integration. [Citation Graph (0, 0)][DBLP ] MSE, 2003, pp:117-118 [Conf ] John W. Lockwood Platform and Methodology for Teaching Design of Hardware Modules in Internet Routers and Firewalls. [Citation Graph (0, 0)][DBLP ] MSE, 2001, pp:56-57 [Conf ] John W. Lockwood Automated Team Project Management and Evaluation Through Interactive Web Modules. [Citation Graph (0, 0)][DBLP ] MSE, 1999, pp:26-27 [Conf ] Christopher K. Zuver , Christopher E. Neely , John W. Lockwood Internet-based Tool for System-On-Chip Project Testing and Grading. [Citation Graph (0, 0)][DBLP ] MSE, 2003, pp:119-120 [Conf ] Todd S. Sproull , Richard Hough , John W. Lockwood , Christopher K. Zuver , Kent English , John Meier Sensor fusion and correlation. [Citation Graph (0, 0)][DBLP ] SenSys, 2005, pp:316- [Conf ] Haoyu Song , Sarang Dharmapurikar , Jonathan S. Turner , John W. Lockwood Fast hash table lookup using extended bloom filter: an aid to network processing. [Citation Graph (0, 0)][DBLP ] SIGCOMM, 2005, pp:181-192 [Conf ] Phillip H. Jones , Young H. Cho , John W. Lockwood Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2007, pp:391-400 [Conf ] Jay R. Moorman , John W. Lockwood Multiclass Priority Fair Queuing for Hybrid Wired/Wireless Quality of Service Support. [Citation Graph (0, 0)][DBLP ] WOWMOM, 1999, pp:43-50 [Conf ] Jay R. Moorman , John W. Lockwood , Sung-Mo Kang Real-time prioritized call admission control in a base station scheduler. [Citation Graph (0, 0)][DBLP ] WOWMOM, 2000, pp:28-37 [Conf ] Sarang Dharmapurikar , John W. Lockwood Fast and scalable pattern matching for content filtering. [Citation Graph (0, 0)][DBLP ] ANCS, 2005, pp:183-192 [Conf ] Sarang Dharmapurikar , Haoyu Song , Jonathan S. Turner , John W. Lockwood Fast packet classification using bloom filters. [Citation Graph (0, 0)][DBLP ] ANCS, 2006, pp:61-70 [Conf ] John W. Lockwood , Christopher E. Neely , Christopher K. Zuver , David Lim Automated tools to implement and test Internet systems in reconfigurable hardware. [Citation Graph (0, 0)][DBLP ] Computer Communication Review, 2003, v:33, n:3, pp:103-110 [Journal ] David E. Taylor , Jonathan S. Turner , John W. Lockwood , Edson L. Horta Dynamic hardware plugins: exploiting reconfigurable hardware for high-performance programmable routers. [Citation Graph (0, 0)][DBLP ] Computer Networks, 2002, v:38, n:3, pp:295-310 [Journal ] Shobana Padmanabhan , Phillip Jones , David V. Schuehler , Scott J. Friedman , Praveen Krishnamurthy , Huakai Zhang , Roger D. Chamberlain , Ron Cytron , Jason E. Fritts , John W. Lockwood Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP ] International Journal of Parallel Programming, 2005, v:33, n:2-3, pp:115-136 [Journal ] Sarang Dharmapurikar , Praveen Krishnamurthy , Todd S. Sproull , John W. Lockwood Deep Packet Inspection using Parallel Bloom Filters. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2004, v:24, n:1, pp:52-61 [Journal ] Florian Braun , John W. Lockwood , Marcel Waldvogel Protocol Wrappers for Layered Network Packet Processing in Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2002, v:22, n:1, pp:66-74 [Journal ] John W. Lockwood Guest Editor's Introduction: Hot Interconnects 10--Thinking beyond the Internet. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2003, v:23, n:1, pp:8-9 [Journal ] John W. Lockwood , Marwan Krunz Guest Editors' Introduction: Hot Interconnects. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2002, v:22, n:1, pp:8-9 [Journal ] Bharath Madhusudan , John W. Lockwood A Hardware-Accelerated System for Real-Time Worm Detection. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:1, pp:60-69 [Journal ] David V. Schuehler , John W. Lockwood TCP Splitter: A TCP/IP Flow Monitor in Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2003, v:23, n:1, pp:54-59 [Journal ] David V. Schuehler , James Moscola , John W. Lockwood Architecture for a Hardware-Based, TCP/IP Content-Processing System. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2004, v:24, n:1, pp:62-69 [Journal ] James Moscola , Young H. Cho , John W. Lockwood Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices. [Citation Graph (0, 0)][DBLP ] FPL, 2006, pp:1-4 [Conf ] Phillip H. Jones , John W. Lockwood , Young H. Cho A Thermal Management and Profiling Method for Reconfigurable Hardware Applications. [Citation Graph (0, 0)][DBLP ] FPL, 2006, pp:1-7 [Conf ] G. Adam Covington , Charles L. G. Comstock , Andrew A. Levine , John W. Lockwood , Young H. Cho High Speed Document Clustering in Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP ] FPL, 2006, pp:1-7 [Conf ] Jonathan S. Turner , Patrick Crowley , John D. DeHart , Amy Freestone , Brandon Heller , Fred Kuhns , Sailesh Kumar , John W. Lockwood , Jing Lu , Michael Wilson , Charles Wiseman , David Zar Supercharging planetlab: a high performance, multi-application, overlay network platform. [Citation Graph (0, 0)][DBLP ] SIGCOMM, 2007, pp:85-96 [Conf ] Changing Output Quality for Thermal Management. [Citation Graph (, )][DBLP ] A Packet Generator on the NetFPGA Platform. [Citation Graph (, )][DBLP ] Adaptive Thermoregulation for Applications on Reconfigurable Devices. [Citation Graph (, )][DBLP ] TCP-Splitter: A TCP/IP Flow Monitor in Reconfigurable Hardware. [Citation Graph (, )][DBLP ] Distributed Instrusion Prevention in Active and Extensible Networks. [Citation Graph (, )][DBLP ] Empirical performance assessment using soft-core processors on reconfigurable hardware. [Citation Graph (, )][DBLP ] Search in 0.116secs, Finished in 0.118secs