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Maurizio Zamboni: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Guido Masera, Gianluca Piccinini, M. Ruo Roch, Maurizio Zamboni
    A Quantitative Approach to the Design of an Optimized Hardware Interpreter for Java Byte-Code. [Citation Graph (0, 0)][DBLP]
    Applied Informatics, 1999, pp:51-54 [Conf]
  2. F. Viglione, Guido Masera, Gianluca Piccinini, M. Ruo Roch, Maurizio Zamboni
    A 50 Mbit/s Iterative Turbo-Decoder. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:176-180 [Conf]
  3. Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni
    Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:246- [Conf]
  4. Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni
    Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:332-339 [Conf]
  5. Guido Masera, Gianluca Piccinini, Massimo Ruo Roth, Maurizio Zamboni
    New 2 Gbit/s CMOS I/O pads. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:82-85 [Conf]
  6. Pasquale Cocchini, Massoud Pedram, Gianluca Piccinini, Maurizio Zamboni
    Fanout optimization under a submicron transistor-level delay model. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:551-556 [Conf]
  7. Pierluigi Civera, F. Maddaleno, Gianluca Piccinini, Maurizio Zamboni
    An Experimental VLSI Prolog Interpreter: Preliminary Measurements and Results. [Citation Graph (0, 0)][DBLP]
    ISCA, 1987, pp:117-126 [Conf]
  8. Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni
    Synthesis of low-leakage PD-SOI circuits with body-biasing. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:287-290 [Conf]
  9. Mariagrazia Graziano, Marco Delaurenti, Guido Masera, Gianluca Piccinini, Maurizio Zamboni
    Noise Safety Design Methodologies. [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:157-0 [Conf]
  10. Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni
    Effects of Temperature in Deep-Submicron Global Interconnect Optimization. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:90-100 [Conf]
  11. M. Addino, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni
    A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:121-130 [Conf]
  12. Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, M. M. Prono, Maurizio Zamboni
    Clock Distribution Network Optimization under Self-Heating and Timing Constraints. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2002, pp:198-208 [Conf]
  13. Mariagrazia Graziano, Marco Delaurenti, Maurizio Zamboni
    Power supply design parameters prediction for high performance IC design flows. [Citation Graph (0, 0)][DBLP]
    SLIP, 2000, pp:61-67 [Conf]
  14. Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni
    Hierarchical power supply noise evaluation for early power grid design prediction. [Citation Graph (0, 0)][DBLP]
    SLIP, 2001, pp:183-188 [Conf]
  15. Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni
    Switching Noise Analysis Framework For High Speed Logic Families. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:524-530 [Conf]
  16. Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni
    An electromigration and thermal model of power wires for a priori high-level reliability prediction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:4, pp:349-358 [Journal]
  17. Mariagrazia Graziano, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni
    Effects of temperature in deep-submicron global interconnect optimization in future technology nodes. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2004, v:35, n:10, pp:849-857 [Journal]
  18. Marco Crepaldi, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni
    An effective AMS top-down methodology applied to the design of a mixed-signal UWB system-on-chip. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1424-1429 [Conf]
  19. Guido Masera, Gianluca Piccinini, M. Ruo Roch, Maurizio Zamboni
    VLSI architectures for turbo codes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:3, pp:369-379 [Journal]
  20. Guido Masera, M. Mazza, Gianluca Piccinini, F. Viglione, Maurizio Zamboni
    Architectural strategies for low-power VLSI turbo decoders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:3, pp:279-285 [Journal]
  21. Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni
    Coupled electro-thermal modeling and optimization of clock networks. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:12, pp:1175-1185 [Journal]

  22. MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture. [Citation Graph (, )][DBLP]


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