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Publications of Author

1. Maneesha Dalmia, André Ivanov, Sassan Tabatabaei
   Power supply current monitoring techniques for testing PLLs. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 1997, pp:366-371 [Conf]
   
2. Sumbal Rafiq, André Ivanov, Sassan Tabatabaei, Michel Renovell
   Testing for Floating Gates Defects in CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 1998, pp:228-236 [Conf]
   
3. Baosheng Wang, Yong B. Cho, Sassan Tabatabaei, André Ivanov
   Yield, Overall Test Environment Timing Accuracy, and Defect Level Trade-Offs for High-Speed Interconnect Device Testing. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2003, pp:348-353 [Conf]
   
4. Sassan Tabatabaei, André Ivanov
   A built-in current monitor for testing analog circuit blocks. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 1999, pp:109-114 [Conf]
   
5. Andy Kuo, Touraj Farahmand, Nelson Ou, André Ivanov, Sassan Tabatabaei
   Jitter Models and Measurement Methods for High-Speed Serial Interconnects. [Citation Graph (0, 0)][DBLP]
   ITC, 2004, pp:1295-1302 [Conf]
   
6. Sassan Tabatabaei, André Ivanov
   An Embedded Core for Sub-Picosecond Timing Measurements. [Citation Graph (0, 0)][DBLP]
   ITC, 2002, pp:129-137 [Conf]
   
7. Sassan Tabatabaei, Michael Lee, Freddy Ben-Zeev
   Jitter Generation and Measurement for Test of Multigbps Serial IO. [Citation Graph (0, 0)][DBLP]
   ITC, 2004, pp:1313-1321 [Conf]
   
8. Karim Arabi, Klaus-Dieter Hilliges, David C. Keezer, Sassan Tabatabaei
   Multi-GigaHertz Testing Challenges and Solutions. [Citation Graph (0, 0)][DBLP]
   VTS, 2002, pp:265-268 [Conf]
   
9. Adam Osseiran, William De Wilkins, Barry Baril, Sassan Tabatabaei, Fidel Muradali, Ken Posse, Lee Song
   Analog and Mixed Signal BIST: Too Much, Too Little, Too Late? [Citation Graph (0, 0)][DBLP]
   VTS, 2002, pp:175-176 [Conf]
   
10. Sassan Tabatabaei, André Ivanov
    A Current Integrator for BIST of Mixed-Signal ICs. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:311-318 [Conf]
    
11. Florence Azaïs, Yves Bertrand, Michel Renovell, André Ivanov, Sassan Tabatabaei
    An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:1, pp:60-67 [Journal]
    
12. Nelson Ou, Touraj Farahmand, Andy Kuo, Sassan Tabatabaei, André Ivanov
    Jitter Models for the Design and Test of Gbps-Speed Serial Interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:4, pp:302-313 [Journal]
    
13. Sassan Tabatabaei, André Ivanov
    Embedded Timing Analysis: A SoC Infrastructure. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:3, pp:24-36 [Journal]
    
14. Baosheng Wang, Andy Kuo, Touraj Farahmand, André Ivanov, Yong B. Cho, Sassan Tabatabaei
    A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2005, v:21, n:6, pp:621-630 [Journal]