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Payam Heydari: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Payam Heydari
    High-frequency noise in RF active CMOS mixers. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:57-60 [Conf]
  2. Payam Heydari, Massoud Pedram
    Balanced truncation with spectral shaping for RLC interconnects. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:203-208 [Conf]
  3. Payam Heydari, Massoud Pedram
    Interconnect Energy Dissipation in High-Speed ULSI Circuits. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:132-140 [Conf]
  4. Payam Heydari
    Characterizing the effects of clock jitter due to substrate noise in discrete-time D/S modulators. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:532-537 [Conf]
  5. Payam Heydari
    Design issues in low-voltage high-speed current-mode logic buffers. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2003, pp:21-26 [Conf]
  6. Payam Heydari, Massoud Pedram
    Model Reduction of Variable-Geometry Interconnects using Variational Spectrally-Weighted Balanced Truncation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:586-591 [Conf]
  7. Payam Heydari, Massoud Pedram
    Analysis and Optimization of Ground Bounce in Digital CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 2000, pp:121-126 [Conf]
  8. Payam Heydari, Massoud Pedram
    Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:104-109 [Conf]
  9. Payam Heydari, Massoud Pedram
    Jitter-Induced Power/ground Noise in CMOS PLLs: A Design Perspective. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:209-213 [Conf]
  10. Payam Heydari, Ravindran Mohanavelu
    Design of ultra high-speed CMOS CML buffers and latches. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:208-211 [Conf]
  11. Ravindran Mohanavelu, Payam Heydari
    A novel ultra high-speed flip-flop-based frequency divider. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:169-172 [Conf]
  12. Amin Q. Safarian, Payam Heydari
    Design and analysis of a distributed regenerative frequency divider using distributed mixer. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:992-995 [Conf]
  13. Amin Q. Safarian, Payam Heydari
    A study of high-frequency regenerative frequency dividers. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2695-2698 [Conf]
  14. Ahmad Yazdi, Payam Heydari
    A novel non-uniform distributed amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:613-616 [Conf]
  15. Payam Heydari
    Energy dissipation modeling of lossy transmission lines driven by CMOS inverters. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:309-312 [Conf]
  16. Payam Heydari, Ying Zhang
    A novel high frequency, high-efficiency, differential class-E power amplifier in 0.18mum CMOS. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:455-458 [Conf]
  17. Amin Shameli, Payam Heydari
    A novel power optimization technique for ultra-low power RFICs. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:274-279 [Conf]
  18. Payam Heydari, Massoud Pedram
    Calculation of ramp response of lossy transmission lines using two-port network functions. [Citation Graph (0, 0)][DBLP]
    ISPD, 1998, pp:152-157 [Conf]
  19. Soroush Abbaspour, Massoud Pedram, Payam Heydari
    Optimizing the Energy-Delay-Ringing Product in On-Chip CMOS Line Drivers. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:261-266 [Conf]
  20. Payam Heydari
    Design and Analysis of Low-Voltage Current-Mode Logic Buffers. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:293-298 [Conf]
  21. Payam Heydari
    Design Considerations for Low-Power Ultra Wideband Receivers. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:668-673 [Conf]
  22. Ahmad Yazdi, Payam Heydari
    The Design and Analysis of Non-Uniform Down-Sized Differential Distributed Amplifiers. [Citation Graph (0, 0)][DBLP]
    ISQED, 2004, pp:528-533 [Conf]
  23. Payam Heydari, Massoud Pedram
    Interconnect Energy Dissipation in High-Speed ULSI Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:132-0 [Conf]
  24. Payam Heydari, Massoud Pedram
    Capacitive coupling noise in high-speed VLSI circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:3, pp:478-488 [Journal]
  25. Payam Heydari, Ravindran Mohanavelu
    Design of ultrahigh-speed low-voltage CMOS CML buffers and latches. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:10, pp:1081-1093 [Journal]
  26. Amin Q. Safarian, Ahmad Yazdi, Payam Heydari
    Design and analysis of an ultrawide-band distributed CMOS mixer. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:5, pp:618-629 [Journal]
  27. Jeffrey Johnson, Vipul Jain, Payam Heydari
    A Nonlinear Model for Phase Noise and Jitter in LC Oscillators. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3095-3098 [Conf]
  28. Fred Tzeng, Payam Heydari
    A novel millimeter-wave multi-order LC oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  29. Payam Heydari, Massoud Pedram
    Ground bounce in digital VLSI circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:2, pp:180-193 [Journal]

  30. A Universal Code-Modulated Path-Sharing Multi-Antenna Receiver. [Citation Graph (, )][DBLP]


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