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Mary W. Hall: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jaewook Shin, Jacqueline Chame, Mary W. Hall
    Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:45-55 [Conf]
  2. Byoungro So, Mary W. Hall
    Increasing the Applicability of Scalar Replacement. [Citation Graph (0, 0)][DBLP]
    CC, 2004, pp:185-201 [Conf]
  3. Jaewook Shin, Mary W. Hall, Jacqueline Chame
    Superword-Level Parallelism in the Presence of Control Flow. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:165-175 [Conf]
  4. Byoungro So, Mary W. Hall, Heidi E. Ziegler
    Custom Data Layout for Memory Parallelism. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:291-302 [Conf]
  5. Chun Chen, Jacqueline Chame, Mary W. Hall
    Combining Models and Guided Empirical Search to Optimize for Multiple Levels of the Memory Hierarchy. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:111-122 [Conf]
  6. Byoungro So, Pedro C. Diniz, Mary W. Hall
    Using estimates from behavioral synthesis tools in compiler-directed design space exploration. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:514-519 [Conf]
  7. Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz
    Compiler-generated communication for pipelined FPGA applications. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:610-615 [Conf]
  8. Jafar Adibi, Tim Barrett, Spundun Bhatt, Hans Chalupsky, Jacqueline Chame, Mary W. Hall
    Processing-in-memory technology for knowledge discovery algorithms. [Citation Graph (0, 0)][DBLP]
    DaMoN, 2006, pp:2- [Conf]
  9. Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro C. Diniz
    Coarse-Grain Pipelining on Multiple FPGA Architectures. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:77-0 [Conf]
  10. Heidi E. Ziegler, Mary W. Hall
    Evaluating heuristics in automatically mapping multi-loop applications to FPGAs. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:184-195 [Conf]
  11. Keith D. Cooper, Mary W. Hall, Ken Kennedy
    Procedure cloning. [Citation Graph (0, 0)][DBLP]
    ICCL, 1992, pp:96-105 [Conf]
  12. Jeffrey T. Draper, Jacqueline Chame, Mary W. Hall, Craig S. Steele, Tim Barrett, Jeff LaCoss, John J. Granacki, Jaewook Shin, Chun Chen, Chang Woo Kang, Ihn Kim Gokhan
    The architecture of the DIVA processing-in-memory chip. [Citation Graph (0, 0)][DBLP]
    ICS, 2002, pp:14-25 [Conf]
  13. Sungdo Moon, Mary W. Hall, Brian R. Murphy
    Predicated Array Data-flow Analysis for Run-time Parallelization. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:204-211 [Conf]
  14. Byoungro So, Sungdo Moon, Mary W. Hall
    Measuring the Effectiveness of Automatic Parallelization in SUIF. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:212-219 [Conf]
  15. Mary W. Hall, Craig S. Steele
    Memory Management in a PIM-Based Architecture. [Citation Graph (0, 0)][DBLP]
    Intelligent Memory Systems, 2000, pp:104-121 [Conf]
  16. Nastaran Baradaran, Jacqueline Chame, Chun Chen, Pedro C. Diniz, Mary W. Hall, Yoon-Ju Lee, Bing Liu 0002, Robert F. Lucas
    ECO: An Empirical-Based Compilation and Optimization System. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:206- [Conf]
  17. Kiran Bondalapati, Pedro C. Diniz, Phillip Duncan, John J. Granacki, Mary W. Hall, Rajeev Jain, Heidi E. Ziegler
    DEFACTO: A Design Environment for Adaptive Computing Technology. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1999, pp:570-578 [Conf]
  18. Pedro C. Diniz, Yoon-Ju Lee, Mary W. Hall, Robert F. Lucas
    A Case Study Using Empirical Optimization for a Large, Engineering Application. [Citation Graph (0, 0)][DBLP]
    IPDPS Next Generation Software Program - NSFNGS - PI Workshop, 2004, pp:- [Conf]
  19. Jacqueline Chame, Chun Chen, Pedro C. Diniz, Mary W. Hall, Yoon-Ju Lee, Robert F. Lucas
    An overview of the ECO project. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  20. Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoungro So, Heidi E. Ziegler
    Bridging the Gap between Compilation and Synthesis in the DEFACTO System. [Citation Graph (0, 0)][DBLP]
    LCPC, 2001, pp:52-70 [Conf]
  21. Mary W. Hall, Brian R. Murphy, Saman P. Amarasinghe, Shih-wei Liao, Monica S. Lam
    Interprocedural Analysis for Parallelization. [Citation Graph (0, 0)][DBLP]
    LCPC, 1995, pp:61-80 [Conf]
  22. Mary W. Hall, John M. Mellor-Crummey, Alan Carle, René G. Rodríguez
    FIAT: A Framework for Interprocedural Analysis and Transfomation. [Citation Graph (0, 0)][DBLP]
    LCPC, 1993, pp:522-545 [Conf]
  23. Yoon-Ju Lee, Mary W. Hall
    A Code Isolator: Isolating Code Fragments from Large Programs. [Citation Graph (0, 0)][DBLP]
    LCPC, 2004, pp:164-178 [Conf]
  24. Heidi E. Ziegler, Mary W. Hall, Byoungro So
    Search Space Properties for Mapping Coarse-Grain Pipelined FPGA Applications. [Citation Graph (0, 0)][DBLP]
    LCPC, 2003, pp:1-16 [Conf]
  25. Chun Chen, Jacqueline Chame, Mary W. Hall, Kristina Lerman
    A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization. [Citation Graph (0, 0)][DBLP]
    LCPC, 2005, pp:433-440 [Conf]
  26. Sungdo Moon, Byoungro So, Mary W. Hall, Brian R. Murphy
    A Case for Combining Compile-Time and Run-Time Parallelization. [Citation Graph (0, 0)][DBLP]
    LCR, 1998, pp:91-106 [Conf]
  27. Byoungro So, Mary W. Hall, Pedro C. Diniz
    A Compiler Approach to Fast Hardware Design Space Exploration in FPGA-based Systems. [Citation Graph (0, 0)][DBLP]
    PLDI, 2002, pp:165-176 [Conf]
  28. Mary W. Hall, Timothy J. Harvey, Ken Kennedy, Nathaniel McIntosh, Kathryn S. McKinley, Jeffrey D. Oldham, Michael H. Paleczny, Gerald Roth
    Experiences Using the ParaScope Editor: an Interactive Parallel Programming Tool. [Citation Graph (0, 0)][DBLP]
    PPOPP, 1993, pp:33-43 [Conf]
  29. Sungdo Moon, Mary W. Hall
    Evaluation of Predicated Array Data-Flow Analysis for Automatic Parallelization. [Citation Graph (0, 0)][DBLP]
    PPOPP, 1999, pp:84-95 [Conf]
  30. Mary W. Hall, Brian R. Murphy, Saman P. Amarasinghe
    Interprocedural Parallelization Analysis: A Case Study. [Citation Graph (0, 0)][DBLP]
    PPSC, 1995, pp:650-655 [Conf]
  31. Mary W. Hall, Saman P. Amarasinghe, Brian R. Murphy, Shih-wei Liao, Monica S. Lam
    Detecting Coarse - Grain Parallelism Using an Interprocedural Parallelizing Compiler. [Citation Graph (0, 0)][DBLP]
    SC, 1995, pp:- [Conf]
  32. Mary W. Hall, Seema Hiranandani, Ken Kennedy, Chau-Wen Tseng
    Interprocedural Compilation of Fortran D for MIMD Distributed-Memory Machines. [Citation Graph (0, 0)][DBLP]
    SC, 1992, pp:522-534 [Conf]
  33. Mary W. Hall, Ken Kennedy, Kathryn S. McKinley
    Interprocedural transformations for parallel code generation. [Citation Graph (0, 0)][DBLP]
    SC, 1991, pp:424-434 [Conf]
  34. Mark D. Hill, Jean-Luc Gaudiot, Mary W. Hall, Joe Marks, Paolo Prinetto, Donna Baglio
    A Wiki for discussing and promoting best practices in research. [Citation Graph (0, 0)][DBLP]
    Commun. ACM, 2006, v:49, n:9, pp:63-64 [Journal]
  35. Keith D. Cooper, Mary W. Hall, Ken Kennedy
    A Methodology for Procedure Cloning. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1993, v:19, n:2, pp:105-117 [Journal]
  36. Mary W. Hall, Jennifer-Ann M. Anderson, Saman P. Amarasinghe, Brian R. Murphy, Shih-wei Liao, Edouard Bugnion, Monica S. Lam
    Maximizing Multiprocessor Performance with the SUIF Compiler. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1996, v:29, n:12, pp:84-89 [Journal]
  37. Mary W. Hall, Margaret Martonosi
    Adaptive parallelism in compiler-parallelized code. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 1998, v:10, n:14, pp:1235-1250 [Journal]
  38. Mary W. Hall, Jennifer-Ann M. Anderson, Saman P. Amarasinghe, Brian R. Murphy, Shih-wei Liao, Edouard Bugnion, Monica S. Lam
    Maximizing Multiprocessor Performance with the SUIF Compiler. [Citation Graph (0, 0)][DBLP]
    Digital Technical Journal, 1998, v:10, n:1, pp:71-80 [Journal]
  39. Yoon-Ju Lee, Pedro C. Diniz, Mary W. Hall, Robert F. Lucas
    Empirical Optimization for a Sparse Linear Solver: A Case Study. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2005, v:33, n:2-3, pp:165-181 [Journal]
  40. Jaewook Shin, Jacqueline Chame, Mary W. Hall
    Exploiting Superword-Level Locality in Multimedia Extension Architectures. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 2003, v:5, n:, pp:- [Journal]
  41. Mary W. Hall, Seema Hiranandani, Ken Kennedy, Chau-Wen Tseng
    Interprocedural Compilation on Fortran D. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:38, n:2, pp:114-129 [Journal]
  42. Keith D. Cooper, Mary W. Hall, Linda Torczon
    Unexpected Side Effects of Inline Substitution: A Case Study. [Citation Graph (0, 0)][DBLP]
    LOPLAS, 1992, v:1, n:1, pp:22-32 [Journal]
  43. Mary W. Hall, Ken Kennedy
    Efficient Call Graph Analysis. [Citation Graph (0, 0)][DBLP]
    LOPLAS, 1992, v:1, n:3, pp:227-242 [Journal]
  44. Robert P. Wilson, Robert S. French, Christopher S. Wilson, Saman P. Amarasinghe, Jennifer-Ann M. Anderson, Steven W. K. Tjiang, Shih-wei Liao, Chau-Wen Tseng, Mary W. Hall, Monica S. Lam, John L. Hennessy
    SUIF: An Infrastructure for Research on Parallelizing and Optimizing Compilers. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 1994, v:29, n:12, pp:31-37 [Journal]
  45. Sungdo Moon, Byoungro So, Mary W. Hall
    Combining compile-time and run-time parallelization[1]This work has been supported by DARPA Contract DABT63-95-C-0118 and NSF Contract ACI-9721368. [Citation Graph (0, 0)][DBLP]
    Scientific Programming, 1999, v:7, n:3-4, pp:247-260 [Journal]
  46. Keith D. Cooper, Mary W. Hall, Linda Torczon
    An Experiment with Inline Substitution. [Citation Graph (0, 0)][DBLP]
    Softw., Pract. Exper., 1991, v:21, n:6, pp:581-601 [Journal]
  47. Mary W. Hall, Saman P. Amarasinghe, Brian R. Murphy, Shih-wei Liao, Monica S. Lam
    Interprocedural parallelization analysis in SUIF. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 2005, v:27, n:4, pp:662-731 [Journal]
  48. Sungdo Moon, Byoungro So, Mary W. Hall
    Evaluating Automatic Parallelization in SUIF. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2000, v:11, n:1, pp:36-49 [Journal]
  49. Evan Torrie, Margaret Martonosi, Chau-Wen Tseng, Mary W. Hall
    Characterizing the Memory Behavior of Compiler-Parallelized Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1996, v:7, n:12, pp:1224-1237 [Journal]
  50. David Callahan, Alan Carle, Mary W. Hall, Ken Kennedy
    Constructing the Procedure Call Multigraph. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1990, v:16, n:4, pp:483-487 [Journal]
  51. Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoungro So, Heidi E. Ziegler
    Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2005, v:29, n:2-3, pp:51-62 [Journal]
  52. Melina Demertzi, Pedro C. Diniz, Mary W. Hall, Anna C. Gilbert, Yi Wang
    A Combined Hardware/Software Optimization Framework for Signal Representation and Recognition. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2007, pp:1230-1237 [Conf]
  53. Chun Chen, Jaewook Shin, Shiva Kintali, Jacqueline Chame, Mary W. Hall
    Model-Guided Empirical Optimization for Multimedia Extension Architectures: A Case Study. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]
  54. Bhupesh Bansal, Ümit V. Çatalyürek, Jacqueline Chame, Chun Chen, Ewa Deelman, Yolanda Gil, Mary W. Hall, Vijay Kumar, Tahsin M. Kurç, Kristina Lerman, Aiichiro Nakano, Yoon-Ju Lee Nelson, Joel H. Saltz, Ashish Sharma, Priya Vashishta
    Intelligent Optimization of Parallel and Distributed Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]

  55. Computation reuse in domain-specific optimization of signal recognition. [Citation Graph (, )][DBLP]


  56. Model-guided autotuning of high-productivity languages for petascale computing. [Citation Graph (, )][DBLP]


  57. An integrated framework for performance-based optimization of scientific workflows. [Citation Graph (, )][DBLP]


  58. Speeding up Nek5000 with autotuning and specialization. [Citation Graph (, )][DBLP]


  59. Designing and parameterizing a workflow for optimization: A case study in biomedical imaging. [Citation Graph (, )][DBLP]


  60. The potential of computation reuse in high-level optimization of a signal recognition system. [Citation Graph (, )][DBLP]


  61. Model-guided performance tuning of parameter values: A case study with molecular dynamics visualization. [Citation Graph (, )][DBLP]


  62. A scalable auto-tuning framework for compiler optimization. [Citation Graph (, )][DBLP]


  63. Loop Transformation Recipes for Code Generation and Auto-Tuning. [Citation Graph (, )][DBLP]


  64. Compiler research: the next 50 years. [Citation Graph (, )][DBLP]


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