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Lieven Eeckhout: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lieven Eeckhout, Hans Vandierendonck, Koenraad De Bosschere
    Workload Design: Selecting Representative Program-Input Pairs. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:83-94 [Conf]
  2. Kenneth Hoste, Aashish Phansalkar, Lieven Eeckhout, Andy Georges, Lizy Kurian John, Koen De Bosschere
    Performance prediction based on inherent program similarity. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:114-122 [Conf]
  3. Lieven Eeckhout, Koenraad De Bosschere
    Hybrid Analytical-Statistical Modeling for Efficiently Exploring Architecture and Workload Design Spaces. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2001, pp:25-0 [Conf]
  4. Veerle Desmet, Lieven Eeckhout, Koen De Bosschere
    Using Decision Trees to Improve Program-Based and Profile-Based Static Branch Prediction. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2005, pp:336-352 [Conf]
  5. Lieven Eeckhout, Koen De Bosschere, Henk Neefs
    On the Feasibility of Fixed-Length Block Structured Architectures. [Citation Graph (0, 0)][DBLP]
    ACAC, 2000, pp:17-25 [Conf]
  6. Andy Georges, Lieven Eeckhout, Koen De Bosschere
    Comparing Low-Level Behavior of SPEC CPU and Java Workloads. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2005, pp:669-679 [Conf]
  7. Lieven Eeckhout, Dirk Stroobandt, Koenraad De Bosschere
    Efficient Microprocessor Design Space Exploration through Statistical Simulatio. [Citation Graph (0, 0)][DBLP]
    Annual Simulation Symposium, 2003, pp:233-240 [Conf]
  8. Luk Van Ertvelde, Filip Hellebaut, Lieven Eeckhout, Koen De Bosschere
    NSL-BLRL: Efficient CacheWarmup for Sampled Processor Simulation. [Citation Graph (0, 0)][DBLP]
    Annual Simulation Symposium, 2006, pp:168-177 [Conf]
  9. Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, James E. Smith
    A performance counter architecture for computing accurate CPI components. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2006, pp:175-184 [Conf]
  10. Kris Venstermans, Lieven Eeckhout, Koen De Bosschere
    Space-Efficient 64-bit Java Objects through Selective Typed Virtual Addressing. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:76-86 [Conf]
  11. Stijn Eyerman, Lieven Eeckhout, Koen De Bosschere
    Efficient design space exploration of high performance embedded out-of-order processors. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:351-356 [Conf]
  12. Hassan Sbeyti, Smaïl Niar, Lieven Eeckhout
    Adaptive Prefetching for Multimedia Applications in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1350-1351 [Conf]
  13. Lieven Eeckhout, Henk Neefs, Koenraad De Bosschere, Jan Van Campenhout
    Investigating the Implementation of a Block Structured Architecture in an Early Design Stage. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1186-0 [Conf]
  14. Frederik Vandeputte, Lieven Eeckhout, Koen De Bosschere
    A Detailed Study on Phase Predictors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2005, pp:571-581 [Conf]
  15. Michael Van Biesbrouck, Lieven Eeckhout, Brad Calder
    Efficient Sampling Startup for Sampled Processor Simulation. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2005, pp:47-67 [Conf]
  16. Dries Buytaert, Kris Venstermans, Lieven Eeckhout, Koen De Bosschere
    Garbage Collection Hints. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2005, pp:233-248 [Conf]
  17. Davy Genbrugge, Lieven Eeckhout, Koen De Bosschere
    Accurate memory data flow modeling in statistical simulation. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:87-96 [Conf]
  18. Joshua J. Yi, Hans Vandierendonck, Lieven Eeckhout, David J. Lilja
    The exigency of benchmark and compiler drift: designing tomorrow's processors with yesterday's tools. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:75-86 [Conf]
  19. Lieven Eeckhout, Robert H. Bell Jr., Bastiaan Stougie, Koen De Bosschere, Lizy Kurian John
    Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:350-363 [Conf]
  20. Lieven Eeckhout
    Efficient architectural design of high performance microprocessors. [Citation Graph (0, 0)][DBLP]
    ISPASS, 2004, pp:170- [Conf]
  21. Dries Buytaert, Andy Georges, Lieven Eeckhout, Koen De Bosschere
    Bottleneck analysis in java applications using hardware performance monitors. [Citation Graph (0, 0)][DBLP]
    OOPSLA Companion, 2004, pp:172-173 [Conf]
  22. Dries Buytaert, Jonas Maebe, Lieven Eeckhout, Koen De Bosschere
    Building Java program analysis tools using Javana. [Citation Graph (0, 0)][DBLP]
    OOPSLA Companion, 2006, pp:653-654 [Conf]
  23. Lieven Eeckhout, Andy Georges, Koenraad De Bosschere
    How java programs interact with virtual machines at the microarchitectural level. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 2003, pp:169-186 [Conf]
  24. Andy Georges, Dries Buytaert, Lieven Eeckhout, Koen De Bosschere
    Method-level phase behavior in java workloads. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 2004, pp:270-287 [Conf]
  25. Jonas Maebe, Dries Buytaert, Lieven Eeckhout, Koen De Bosschere
    Javana: a system for building customized Java program analysis tools. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 2006, pp:153-168 [Conf]
  26. Smaïl Niar, Lieven Eeckhout, Koenraad De Bosschere
    Comparing Multiported Cache Schemes. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:1179-1185 [Conf]
  27. Frederik Vandeputte, Lieven Eeckhout, Koen De Bosschere
    Offline Phase Analysis and Optimization for Multi-configuration Processors. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:202-211 [Conf]
  28. Yue Luo, Lizy Kurian John, Lieven Eeckhout
    Self-Monitored Adaptive Cache Warm-Up for Microprocessor Simulation. [Citation Graph (0, 0)][DBLP]
    SBAC-PAD, 2004, pp:10-17 [Conf]
  29. Lieven Eeckhout, Koen De Bosschere
    Efficient architectural design of high performance microprocessors. [Citation Graph (0, 0)][DBLP]
    Advances in Computers, 2004, v:61, n:, pp:46-107 [Journal]
  30. Lieven Eeckhout, Yue Luo, Koen De Bosschere, Lizy Kurian John
    BLRL: Accurate and Efficient Warmup for Sampled Processor Simulation. [Citation Graph (0, 0)][DBLP]
    Comput. J., 2005, v:48, n:4, pp:451-459 [Journal]
  31. Lieven Eeckhout, Hans Vandierendonck, Koenraad De Bosschere
    Designing Computer Architecture Research Workloads. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2003, v:36, n:2, pp:65-71 [Journal]
  32. Joshua J. Yi, Lieven Eeckhout, David J. Lilja, Brad Calder, Lizy Kurian John, James E. Smith
    The Future of Simulation: A Field of Dreams. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2006, v:39, n:11, pp:22-29 [Journal]
  33. Paul Brebner, Emmanuel Cecchet, Julie Marguerite, Petr Tuma, Octavian Ciuhandu, Bruno Dufour, Lieven Eeckhout, Stéphane Frénot, Arvind S. Krishna, John Murphy, Clark Verbrugge
    Middleware benchmarking: approaches, results, experiences. [Citation Graph (0, 0)][DBLP]
    Concurrency and Computation: Practice and Experience, 2005, v:17, n:15, pp:1799-1805 [Journal]
  34. Yue Luo, Lizy Kurian John, Lieven Eeckhout
    SMA: A Self-Monitored Adaptive Cache Warm-Up Scheme for Microprocessor Simulation. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2005, v:33, n:5, pp:561-581 [Journal]
  35. Lieven Eeckhout, Hans Vandierendonck, Koenraad De Bosschere
    Quantifying the Impact of Input Data Sets on Program Behavior and its Applications. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 2003, v:5, n:, pp:- [Journal]
  36. Hassan Sbeyti, Smaïl Niar, Lieven Eeckhout
    Pattern-driven prefetching for multimedia applications on embedded processors. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2006, v:52, n:4, pp:199-212 [Journal]
  37. Veerle Desmet, Lieven Eeckhout, Koen De Bosschere
    Improved composite confidence mechanisms for a perceptron branch predictor. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2006, v:52, n:3, pp:143-151 [Journal]
  38. Lieven Eeckhout, Smaïl Niar, Koen De Bosschere
    Optimal sample length for efficient cache simulation. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2005, v:51, n:9, pp:513-525 [Journal]
  39. Lieven Eeckhout, Koen De Bosschere
    Quantifying behavioral differences between multimedia and general-purpose workloads. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2003, v:48, n:6-7, pp:199-220 [Journal]
  40. Lieven Eeckhout, Koenraad De Bosschere
    How accurate should early design stage power/performance tools be? A case study with statistical simulation. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 2004, v:73, n:, pp:45-62 [Journal]
  41. Lieven Eeckhout, Koen De Bosschere
    Yet shorter warmup by combining no-state-loss and MRRL for sampled LRU cache simulation. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 2006, v:79, n:5, pp:645-652 [Journal]
  42. Michael Van Biesbrouck, Brad Calder, Lieven Eeckhout
    Efficient Sampling Startup for SimPoint. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2006, v:26, n:4, pp:32-42 [Journal]
  43. Lieven Eeckhout, Sébastien Nussbaum, James E. Smith, Koen De Bosschere
    Statistical Simulation: Adding Efficiency to the Computer Designer's Toolbox. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:5, pp:26-38 [Journal]
  44. Lieven Eeckhout, Koen De Bosschere
    Efficient simulation of trace samples on parallel machines. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2004, v:30, n:3, pp:317-335 [Journal]
  45. Kris Venstermans, Lieven Eeckhout, Koen De Bosschere
    64-bit versus 32-bit Virtual Machines for Java. [Citation Graph (0, 0)][DBLP]
    Softw., Pract. Exper., 2006, v:36, n:1, pp:1-26 [Journal]
  46. Ajay Joshi, Aashish Phansalkar, Lieven Eeckhout, Lizy Kurian John
    Measuring Benchmark Similarity Using Inherent Program Characteristics. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:6, pp:769-782 [Journal]
  47. Juan Hamers, Lieven Eeckhout
    Resource prediction for media stream decoding. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:594-599 [Conf]
  48. Kris Venstermans, Lieven Eeckhout, Koen De Bosschere
    Object-Relative Addressing: Compressed Pointers in 64-Bit Java Virtual Machines. [Citation Graph (0, 0)][DBLP]
    ECOOP, 2007, pp:79-100 [Conf]
  49. Simon Kluyskens, Lieven Eeckhout
    Branch History Matching: Branch Predictor Warmup for Sampled Simulation. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2007, pp:153-167 [Conf]
  50. Juan Hamers, Lieven Eeckhout, Koen De Bosschere
    Exploiting Video Stream Similarity for Energy-Efficient Decoding. [Citation Graph (0, 0)][DBLP]
    MMM (2), 2007, pp:11-22 [Conf]
  51. Dries Buytaert, Andy Georges, Michael Hind, Matthew Arnold, Lieven Eeckhout, Koen De Bosschere
    Using hpm-sampling to drive dynamic compilation. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 2007, pp:553-568 [Conf]
  52. Andy Georges, Dries Buytaert, Lieven Eeckhout
    Statistically rigorous java performance evaluation. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 2007, pp:57-76 [Conf]
  53. Andy Georges, Dries Buytaert, Lieven Eeckhout
    Adding rigorous statistics to the Java benchmarker's toolbox. [Citation Graph (0, 0)][DBLP]
    OOPSLA Companion, 2007, pp:793-794 [Conf]
  54. Kenneth Hoste, Lieven Eeckhout, Hendrik Blockeel
    Analyzing commercial processor performance numbers for predicting performance of applications of interest. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 2007, pp:375-376 [Conf]
  55. Kenneth Hoste, Lieven Eeckhout
    Comparing Benchmarks Using Key Microarchitecture-Independent Characteristics. [Citation Graph (0, 0)][DBLP]
    IISWC, 2006, pp:83-92 [Conf]
  56. Ajay Joshi, Lieven Eeckhout, Robert H. Bell Jr., Lizy Kurian John
    Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks. [Citation Graph (0, 0)][DBLP]
    IISWC, 2006, pp:105-115 [Conf]
  57. Joshua J. Yi, Resit Sendag, Lieven Eeckhout, Ajay Joshi, David J. Lilja, Lizy Kurian John
    Evaluating Benchmark Subsetting Approaches. [Citation Graph (0, 0)][DBLP]
    IISWC, 2006, pp:93-104 [Conf]
  58. Frederik Vandeputte, Lieven Eeckhout, Koen De Bosschere
    Exploiting program phase behavior for energy reduction on multi-configuration processors. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:8, pp:489-500 [Journal]
  59. Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, James E. Smith
    A Top-Down Approach to Architecting CPI Component Performance Counters. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2007, v:27, n:1, pp:84-93 [Journal]
  60. Kenneth Hoste, Lieven Eeckhout
    Microarchitecture-Independent Workload Characterization. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2007, v:27, n:3, pp:63-72 [Journal]
  61. Kris Venstermans, Lieven Eeckhout, Koen De Bosschere
    Java object header elimination for reduced memory consumption in 64-bit virtual machines. [Citation Graph (0, 0)][DBLP]
    TACO, 2007, v:4, n:3, pp:- [Journal]

  62. Studying Compiler-Microarchitecture Interactions through Interval Analysis. [Citation Graph (, )][DBLP]


  63. Exploring the Application Behavior Space Using Parameterized Synthetic Benchmarks. [Citation Graph (, )][DBLP]


  64. Dispersing proprietary applications as benchmarks through code mutation. [Citation Graph (, )][DBLP]


  65. Per-thread cycle accounting in SMT processors. [Citation Graph (, )][DBLP]


  66. Probabilistic job symbiosis modeling for SMT processor scheduling. [Citation Graph (, )][DBLP]


  67. Cole: compiler optimization level exploration. [Citation Graph (, )][DBLP]


  68. Automated just-in-time compiler tuning. [Citation Graph (, )][DBLP]


  69. Automated hardware-independent scenario identification. [Citation Graph (, )][DBLP]


  70. Finding Stress Patterns in Microprocessor Workloads. [Citation Graph (, )][DBLP]


  71. Studying Compiler Optimizations on Superscalar Processors Through Interval Analysis. [Citation Graph (, )][DBLP]


  72. Phase Complexity Surfaces: Characterizing Time-Varying Program Behavior. [Citation Graph (, )][DBLP]


  73. MLP-Aware Runahead Threads in a Simultaneous Multithreading Processor. [Citation Graph (, )][DBLP]


  74. A Memory-Level Parallelism Aware Fetch Policy for SMT Processors. [Citation Graph (, )][DBLP]


  75. Automated microprocessor stressmark generation. [Citation Graph (, )][DBLP]


  76. Statistical simulation of chip multiprocessors running multi-program workloads. [Citation Graph (, )][DBLP]


  77. Modeling critical sections in Amdahl's law and its implications for multicore design. [Citation Graph (, )][DBLP]


  78. Evaluating the efficacy of statistical simulation for design space exploration. [Citation Graph (, )][DBLP]


  79. Considering all starting points for simultaneous multithreading simulation. [Citation Graph (, )][DBLP]


  80. Characterizing the branch misprediction penalty. [Citation Graph (, )][DBLP]


  81. Characterizing the Unique and Diverse Behaviors in Existing and Emerging General-Purpose and Domain-Specific Benchmark Suites. [Citation Graph (, )][DBLP]


  82. Measuring Program Similarity: Experiments with SPEC CPU Benchmark Suites. [Citation Graph (, )][DBLP]


  83. Java performance evaluation through rigorous replay compilation. [Citation Graph (, )][DBLP]


  84. Evaluating iterative optimization across 1000 datasets. [Citation Graph (, )][DBLP]


  85. Sampled Processor Simulation- A Survey. [Citation Graph (, )][DBLP]


  86. Accurate and Efficient Cache Warmup for Sampled Processor Simulation Through NSL-BLRL. [Citation Graph (, )][DBLP]


  87. A Methodology for Analyzing Commercial Processor Performance Numbers. [Citation Graph (, )][DBLP]


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