Conferences in DBLP
Pei-Ji Yang , C. S. Raghavendra Embedding and Reconfiguration of Binary Trees in Faulty Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] Andrew W. Kwan , Lubomir Bic A Structuring Technique for Compute-Aggregate-Broadcast Algorithms on Distributed Memory Computers. [Citation Graph (0, 0)][DBLP ] Conf ] A. Aggarwal , W. T. Ma , G. V. H. Sandri , S. Sarkar Adaptive Graph Computations with a Connection Machine. [Citation Graph (0, 0)][DBLP ] Conf ] Oscar H. Ibarra , Myung Hee Kim Quadtree Building Algorithms on an SIMD Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] Wayne G. Nation , Anthony A. Maciejewski , Howard Jay Siegel Exploiting Concurrency among Tasks in Partitionable Parallel Processing Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Per Stenström A Latency-Hiding Scheme for Multiprocessors with Buffered Multistage Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Yeong-Chang Maa , Dhiraj K. Pradhan , Dominique Thiébaut A Hierarchical Directory Scheme for Large-Scale Cache-Coherent Multipmcessors. [Citation Graph (0, 0)][DBLP ] Conf ] Qutaibah M. Malluhi , Magdy A. Bayoumi Properties and Performance of the Hierarchical Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] Samuel A. Fineberg , Thomas L. Casavant , Brent H. Pease The Seamless Approach to Reconciling Communication and Locality in Distributed-Memory Parallel Systems. [Citation Graph (0, 0)][DBLP ] Conf ] G. J. W. van Dijk , M. J. van Gils Efficient Process Migration in the EMPS Multiprocessor System. [Citation Graph (0, 0)][DBLP ] Conf ] Ajay Mohindra , Sudhakar Yalamanchili Dominant Representations: A Paradigm for Mapping Parallel Computations. [Citation Graph (0, 0)][DBLP ] Conf ] Lonnie R. Welch Assignment of ADT Modules to Processors. [Citation Graph (0, 0)][DBLP ] Conf ] Ashok Khemka , R. K. Shyamasundar Multiprocessor Scheduling of Periodic Tasks in a Hard Real-Time Environment. [Citation Graph (0, 0)][DBLP ] Conf ] Yosi Ben-Asher , Aviad Cohen , Assaf Schuster , Jop F. Sibeyn The Impact of Task-Length Parameters on the Performance of the Random Load-Balancing Algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Pinaki Mitra Efficient Parallel Shortest Path Algorithms for K-Chordal Graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Ajay Gupta , Hong Wang Generalized Compressed Tree Machines. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaoxiong Zhong , Sanjay V. Rajopadhye , Virginia Mary Lo Parallel Implementation of Divide-and-Conquer Algorithms on Binary de Bruijn Networks. [Citation Graph (0, 0)][DBLP ] Conf ] R. Sarnath , Xin He Efficient Parallel Algorithms for Selection and Searching on Sorted Matrices. [Citation Graph (0, 0)][DBLP ] Conf ] Ahmed Saoudi , Maurice Nivat , C. Pandu Rangan , Ravi Sundaram , G. D. S. Ramkumar A Parallel Algorithm for Recognizing the Shuffle of Two Strings. [Citation Graph (0, 0)][DBLP ] Conf ] Hussein M. Alnuweiri Routing BPS Permutations in VLSI. [Citation Graph (0, 0)][DBLP ] Conf ] David Nassimi Nearly Logarithmic Time Parallel Algorithms for the Class of \pm2^b ASCEND Computations on a SIMD Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] Ju-wook Jang , Viktor K. Prasanna An Optimal Sorting Algorithm on Reconfigurable Mesh. [Citation Graph (0, 0)][DBLP ] Conf ] Chang-Sung Jeong , Jung-Ju Choi An Optimal Parallel Algorithm for Finding the Smallest Enclosing Rectangle on a Mesh-Connected Computer. [Citation Graph (0, 0)][DBLP ] Conf ] Dionisios I. Reisis An Efficient Convex Hull Computation on the Reconfigurable Mesh. [Citation Graph (0, 0)][DBLP ] Conf ] Yosi Ben-Asher , Assaf Schuster The Bus-Usage Method for the Analysis of Reconfiguring Networks Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Sajal K. Das , Calvin Ching-Yuen Chen A New Parallel Algorithm for Breadth-First Search on Interval Graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Zhenhui Yang , Weijia Shang , José A. B. Fortes Conflict-Free Scheduling of Nested Loop Algorithms on Lower Dimensional Processor Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Min-Ih Chen , Ching-Chih Han , Kwei-Jay Lin Scheduling Conditions for Concttrrent Real-Time Readers and Writers. [Citation Graph (0, 0)][DBLP ] Conf ] T. V. Lakshman , A. Bagchi , K. Rastani A Fast Parallel Scheduler for Resource Requests Implemented Using Optical Devices. [Citation Graph (0, 0)][DBLP ] Conf ] Athar B. Tayyab , Jon G. Kuhl Analyzing Performance of Sequencing Mechanisms for Simple Layered Task Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Israel Gottlieb Optimal Deterministic Task Distribution in Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel A. Menascé , Stella C. S. Porto , Satish K. Tripathi Processor Assignment in Heterogeneous Parallel Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Jeff Baxter , Janak H. Patel Profiling Based Task Migration. [Citation Graph (0, 0)][DBLP ] Conf ] Mitchell Flatebo , Ajoy Kumar Datta Two-State Self-Stabilizing Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] J. Allan Yang , Young-il Choo Formal Derivation of an Efficient Parallel 2-D Gauss-Siedel Method. [Citation Graph (0, 0)][DBLP ] Conf ] Jiann-Cherng Shieh Memory Requirements to Balance Thus Asymptotically Full-Speedup FFT Computation on Processor Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Weian Deng , S. Sitharama Iyengar An Optimal Parallel Algorithm for Arithmetic Expression Parsing. [Citation Graph (0, 0)][DBLP ] Conf ] Hua Bi , Wolfgang K. Giloi Supporting Matrix Operations in Vector Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Ambuj Mahanti , Charles J. Daniels IDPS: A Massively Parallel Heuristic Search Algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad Reza Meybodi Banyan Heap Machine. [Citation Graph (0, 0)][DBLP ] Conf ] Susanne E. Hambrusch , Frank K. H. A. Dehne Determining Maximum itk-Width Connectivity on Meshes. [Citation Graph (0, 0)][DBLP ] Conf ] James M. Conrad , Dharma P. Agrawal , Dennis Bahler Scalable Parallel Arc Consistency Algorithms for Shared-Memory Computers. [Citation Graph (0, 0)][DBLP ] Conf ] Rabi N. Mahapatra , Akhilesh Kumar Vector Hartley Transform Employing Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Myung K. Yang , Chita R. Das Analytical Modeling of a Parallel Branch-and-Bound Algorithm on MIN-Based Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Stephan Olariu , James L. Schwing , Jingyuan Zhang Fast Computer Vision Algorithms for Reconfigurable Meshes. [Citation Graph (0, 0)][DBLP ] Conf ] Yuval Caspi , Eliezer Dekel A Near-Optimal Parallel Algorithm for Edge-Coloring Outerplanar Graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas K. Callaway , Earl E. Swartzlander Jr. Implementation of Parallel Processors with Wafer Scale Integration. [Citation Graph (0, 0)][DBLP ] Conf ] Yiwan Wong , Jean-Marc Delosme Space-Optimal Linear Processor Allocation for Systolic Arrays Synthesis. [Citation Graph (0, 0)][DBLP ] Conf ] Mario Kovac , N. Ranganathan , M. Varanasi A Systolic Algorithm and Architecture for Galois Field Arithmetic. [Citation Graph (0, 0)][DBLP ] Conf ] Kyusun Choi , William S. Adams VLSI Implementation of a 256 x 256 Crossbar Interconnection Network. [Citation Graph (0, 0)][DBLP ] Conf ] M. Hakami , P. Warter , C. Boncelet , David Nassimi VLSI Architectures for Recursive and Multiple-Window Order Statistic Filtering. [Citation Graph (0, 0)][DBLP ] Conf ] George Miel , Evangelos A. Yfantis A Software Tool for Cellular Mapping of Discrete Unitary Transforms. [Citation Graph (0, 0)][DBLP ] Conf ] Donald B. Johnson , Panagiotis Takis Metaxas Optimal Algorithms for the Vertex Updating Problem of a Minimum Spanning Tree. [Citation Graph (0, 0)][DBLP ] Conf ] Weixiong Zhang , Richard E. Korf Parallel Heap Operations on EREW PRAM: Summary of Results. [Citation Graph (0, 0)][DBLP ] Conf ] Theodore Johnson , Adrian Colbrook A Distributed Data-Balanced Dictionary Based on the B-Link Tree. [Citation Graph (0, 0)][DBLP ] Conf ] Jing-Fu Fu Jenq , Sartaj Sahni Serial and Parallel Algorithms for the Medial Axis Transform. [Citation Graph (0, 0)][DBLP ] Conf ] Nicholas Giolmas , Daniel W. Watson , David M. Chelberg , Howard Jay Siegel A Parallel Approach to Hybrid Range Image Segmentation. [Citation Graph (0, 0)][DBLP ] Conf ] Mauricio J. Serrano , Behrooz Parhami Optimal Aspect Ratio and Number of Separable Row/Column Buses for Mesh-Connected Parallel Computers. [Citation Graph (0, 0)][DBLP ] Conf ] Shalini Yajnik , Niraj K. Jha Design and Analysis of Fault-Detecting and Fault-Locating Schedules for Computation DAGs. [Citation Graph (0, 0)][DBLP ] Conf ] Michael F. Kilian A Model of Objects and Communication for Massively Parallel Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Anand Sivasubramaniam , Umakishore Ramachandran , H. Venkateswaran A Computational Model for Message Passing. [Citation Graph (0, 0)][DBLP ] Conf ] Alok N. Choudhary , Rajeev Thakur Evaluation of Connected Component Labeling Algorithms on Shared and Distributed Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Karsten Schwan , Ahmed Gheith , Hongyi Zhou Building Families of Object-Based Multiprocessor Kernels. [Citation Graph (0, 0)][DBLP ] Conf ] Lal George , Gary Lindstrom Using a Functional Language id Graph Reduction to Program Multiprocessor Machines, or Functional Control of Imperative Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Christophe Cérin Automatic Parallelization of Programs with Tools of Trace Theory. [Citation Graph (0, 0)][DBLP ] Conf ] Charles M. Fiduccia Bussed Interconnection Networks from Trees. [Citation Graph (0, 0)][DBLP ] Conf ] Abdou Youssef On-Line Communication on Circuit-Switched Fixed Routing Meshes. [Citation Graph (0, 0)][DBLP ] Conf ] Douglas M. Blough , Shahriar Najand Fault-Tolerant Multiprocessor System Routing Using Incomplete Diagnostic Information. [Citation Graph (0, 0)][DBLP ] Conf ] Abdou Youssef , Brian D. Alleyne , Isaac D. Scherson Permutation Routing in Restricted Access Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Jeffrey T. Draper , Joydeep Ghosh Multipath E-Cube Algorithms (MECA) for Adaptive Wormhole Routing and Broadcasting in itk-ary itn-Cubes. [Citation Graph (0, 0)][DBLP ] Conf ] Anujan Varma , Suresh Chalasani Asymmetrical Multiconnection Three-Stage Clos Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Guy E. Blelloch , Siddhartha Chatterjee , Marco Zagha Solving Linear Recurrences with Loop Raking. [Citation Graph (0, 0)][DBLP ] Conf ] Jing-Fu Fu Jenq , Sartaj Sahni Histogramming on a Reconfigurable Mesh Computer. [Citation Graph (0, 0)][DBLP ] Conf ] Jianping Zhu Householder Transformation for the Regularized Least Square Problem on iPSX/860. [Citation Graph (0, 0)][DBLP ] Conf ] Richard Mazzaferri , Heiko Schröder A Superior Class of Networks for Reconfigurable Meshes. [Citation Graph (0, 0)][DBLP ] Conf ] Nader Bagherzadeh , Kent Hawk Parallel Implementation of the Auction Algorithm on the Intel Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] Sushil K. Prasad , Narsingh Deo Parallel Heap: Improved and Simplified. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiwei Xu , Kai Hwang Language Constructs for Structured Parallel Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Mary Mehrnoosh Eshaghian Cluster-M Parallel Programming Model. [Citation Graph (0, 0)][DBLP ] Conf ] Chandra R. Asthagiri , Jerry L. Potter Associative Parallel Lexing. [Citation Graph (0, 0)][DBLP ] Conf ] Manish Gupta , Prithviraj Banerjee Compile-Time Estimation of Communication Costs on Multicomputers. [Citation Graph (0, 0)][DBLP ] Conf ] Peter Mills , Lars S. Nyland , Jan Prins , John H. Reif Prototyping N-Body Simulation in Proteus. [Citation Graph (0, 0)][DBLP ] Conf ] M. Kishore Kumar , P. Sreenivasa Kumar , A. Basu A Library Environment for Distributed-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Samir M. Koriem , Lalit M. Patnaik Performability Studies of Hypercube Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Glenn Jennings A Functional Execution Model for a Non-Dataflow Tagged Token Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Roman Podraza , Dariusz Turlej , Krzysztof Piorun The Vesicular Dataflow Model. [Citation Graph (0, 0)][DBLP ] Conf ] Srikanth Kambhatla , Jonathan Walpole The Interplay between Granularity, Performance, and Availability in a Replicated Linda Tuple Space. [Citation Graph (0, 0)][DBLP ] Conf ] Luis Gravano , Gustavo D. Pifarré , Gustavo Denicolay , Jorge L. C. Sanz Adaptive Deadlock-Free Worrnhole Routing in Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] Emile Haddad Optimal Allocation of Shared Data over Distributed Memory Hierarchies. [Citation Graph (0, 0)][DBLP ] Conf ] Magali E. Azema-Barac A Conceptual Framework for Implementing Neural Networks on Massively Parallel Machines. [Citation Graph (0, 0)][DBLP ] Conf ] Valerie E. Taylor , Bahram Nour-Omid , David G. Messerschmitt The Effects of Communication Overhead on the Speedup of Parallel 3-D Finite Element Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Jukka Saarinen , Martti Lindroos , Jouni Tomberg , Kimmo Kaski Parallel Coprocessor for Kohonen's Self-Organizing Neural Network. [Citation Graph (0, 0)][DBLP ] Conf ] Reinhard Lüling , Burkhard Monien Load Balancing for Distributed Branch and Bound Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiyong Liu , Jia-Huai You , Xiaobo Li The Odd-Even Expansion Storage Scheme and Its Implementation Issues. [Citation Graph (0, 0)][DBLP ] Conf ] Ashfaq A. Khokhar , Michel Dubois Matching Algorithms and Architecture in Hierarchical Shared-Memory Multiprocessor (HMS) Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Kalyani Bogineni , Patrick W. Dowd Performance Analysis of Two Address Space Allocation Schemes for an Optically Interconnected Distributed Shared-Memory System. [Citation Graph (0, 0)][DBLP ] Conf ] D. N. Jayasimha , Jeff D. Martens Some Architectural and Compilation Issues in the Design of Hierarchical Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Matthew K. Farrens , Arvin Park , Allison Woodruff CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension. [Citation Graph (0, 0)][DBLP ] Conf ] William Tsun-Yuk Hsu , Pen-Chung Yew The Impact of Wiring Constraints on Hierarchical Network Performance. [Citation Graph (0, 0)][DBLP ] Conf ] Jen-Shiuh Liu , Wen-Jing Hsu Distributed Algorithms for Shortest-Path Deadlock-Free Routing and Broadcasting in a Class of Interconnection Topologies. [Citation Graph (0, 0)][DBLP ] Conf ] Qiang Li An Improved Multiple-Path Deadlock-Free Routing Algorithm in Binary Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] Danny Krizanc , Lata Narayanan Multipacket Selection on Mesh-Connected Processor Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Nelson Ge , John K. Antonio , Sharada V. Vitalpur Visualization of a Simple Routing Scheme for Meshes. [Citation Graph (0, 0)][DBLP ] Conf ] Paul Cull , Shawn M. Larson The Möbus Cubes: Improved Cubelike Networks for Parallel Computation. [Citation Graph (0, 0)][DBLP ] Conf ] Masato Notomi , Tadao Murata Hierarchically Organized Petri Net State Space for Reachability and Deadlock Analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Longsong Lin , John K. Antonio Modeling and Control of Distributed Asynchronous Computations. [Citation Graph (0, 0)][DBLP ] Conf ] Piotr Berman , Anupam A. Bharali Distributed Consensus in Semi-Synchronous Systems. [Citation Graph (0, 0)][DBLP ] Conf ] J. P. Samantarai A Paradigm for Distributed Deadlock Avoidance in Multicomputer Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Kazuaki Rokusawa , Nobuyuki Ichiyoshi A Scheme for State Change in a Distributed Environment Using Weighted Throw Counting. [Citation Graph (0, 0)][DBLP ] Conf ] Ten-Hwang Lai , Yu-Chee Tseng , Xuefeng Dong A More Efficient Message-Optimal Algorithm for Distributed Termination Detection. [Citation Graph (0, 0)][DBLP ] Conf ] Robert Kramer , Rajiv Gupta , Mary Lou Soffa The Combining Dag: A Technique for Parallel DataMow Analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Wilson C. Hsieh , William E. Weihl Scalable Reader-Writer Locks for Parallel Systems. [Citation Graph (0, 0)][DBLP ] Conf ] I-Ling Yen , Farokh B. Bastani Hash Table in Massively Parallel Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Eric A. Brewer , Carl A. Waldspurger Preventing Recursion Deadlock in Concurrent Object-Oriented Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Eunmi Choi , Moon-Jung Chung , Yunmo Chung Comparisons and Analysis of Massively Parallel SIMD Architectures for Parallel Logic Simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Philip A. Wilsey , Debra A. Hensgen Exploiting SIMD Computers for General Purpose Computation. [Citation Graph (0, 0)][DBLP ] Conf ] Guohua Jin , Fujie Chen Hybrid Loop Interchange: Optimization for Parallel Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Hiroshi Nishikawa , Peter Steenkiste Aroma: Language Support for Distributed Objects. [Citation Graph (0, 0)][DBLP ] Conf ] 