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Edward A. Lee :
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Edward A. Lee , David G. Messerschmitt Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing. [Citation Graph (1, 0)][DBLP ] IEEE Trans. Computers, 1987, v:36, n:1, pp:24-35 [Journal ] Bilung Lee , Edward A. Lee Hierarchical Concurrent Finite State Machines in Ptolemy. [Citation Graph (0, 0)][DBLP ] ACSD, 1998, pp:34-40 [Conf ] Shuvra S. Bhattacharyya , Praveen K. Murthy , Edward A. Lee Optimized software synthesis for synchronous dataflow. [Citation Graph (0, 0)][DBLP ] ASAP, 1997, pp:250-262 [Conf ] Shuvra S. Bhattacharyya , Sundararajan Sriram , Edward A. Lee Minimizing Synchronization Overhead in Statically Scheduled Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] ASAP, 1995, pp:298-309 [Conf ] Shuvra S. Bhattacharyya , Sundararajan Sriram , Edward A. Lee Latency-constrained Resynchronization for Multiprocessor DSP Implementation. [Citation Graph (0, 0)][DBLP ] ASAP, 1996, pp:365-380 [Conf ] Asawaree Kalavade , Edward A. Lee A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem. [Citation Graph (0, 0)][DBLP ] CODES, 1994, pp:42-48 [Conf ] Edward A. Lee , David G. Messerschmitt Synchronous Data Flow: Describing Signal Processing Algorithm for Parallel Computation. [Citation Graph (0, 0)][DBLP ] COMPCON, 1987, pp:310-315 [Conf ] Xiaojun Liu , Eleftherios Matsikoudis , Edward A. Lee Modeling Timed Concurrent Systems. [Citation Graph (0, 0)][DBLP ] CONCUR, 2006, pp:1-15 [Conf ] Asawaree Kalavade , Edward A. Lee Manifestations of Heterogeneity in Hardware/Software Co-Design. [Citation Graph (0, 0)][DBLP ] DAC, 1994, pp:437-438 [Conf ] Edward A. Lee , E. Goei , H. Heine , W. Ho , S. Bhattacharyya , Jeffery C. Bier , E. Guntvedt GABRIEL: A Design Environment for Programmable DSPs. [Citation Graph (0, 0)][DBLP ] DAC, 1989, pp:141-146 [Conf ] Sharad Malik , D. K. Arvind , Edward Lee , Phil Koopman , Alberto L. Sangiovanni-Vincentelli , Wayne Wolf Embedded systems education (panel abstract). [Citation Graph (0, 0)][DBLP ] DAC, 2000, pp:519- [Conf ] Edward A. Lee , Yuhong Xiong System-Level Types for Component-Based Design. [Citation Graph (0, 0)][DBLP ] EMSOFT, 2001, pp:237-253 [Conf ] Ye Zhou , Edward A. Lee A causality interface for deadlock analysis in dataflow. [Citation Graph (0, 0)][DBLP ] EMSOFT, 2006, pp:44-52 [Conf ] Edward A. Lee Concurrent Semantics Without the Notions of State or State Transitions. [Citation Graph (0, 0)][DBLP ] FORMATS, 2006, pp:18-31 [Conf ] Jordi Cortadella , José A. B. Fortes , Edward A. Lee Design and Prototyping of Digital Signal Processing (DSP) Systems: Introduction. [Citation Graph (0, 0)][DBLP ] HICSS (1), 1994, pp:56-57 [Conf ] Edward A. Lee , Haiyang Zheng Operational Semantics of Hybrid Systems. [Citation Graph (0, 0)][DBLP ] HSCC, 2005, pp:25-53 [Conf ] Jie Liu , Edward A. Lee On the Causality of Mixed-Signal and Hybrid Models. [Citation Graph (0, 0)][DBLP ] HSCC, 2003, pp:328-342 [Conf ] Haiyang Zheng , Edward A. Lee , Aaron D. Ames Beyond Zeno: Get on with It! [Citation Graph (0, 0)][DBLP ] HSCC, 2006, pp:568-582 [Conf ] Edward A. Lee , Alberto L. Sangiovanni-Vincentelli Comparing models of computation. [Citation Graph (0, 0)][DBLP ] ICCAD, 1996, pp:234-241 [Conf ] Gilbert C. Sih , Edward A. Lee Scheduling to Account for Interprocessor Communication within Interconnection-Constrained Processor Networks. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1990, pp:9-16 [Conf ] Edward A. Lee Mulitdimensional Streams Rooted in Dataflow. [Citation Graph (0, 0)][DBLP ] Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, 1993, pp:295-306 [Conf ] Shuvra S. Bhattacharyya , Sundararajan Sriram , Edward A. Lee Self-Timed Resynchronization: A Post-Optimization for Static Multiprocessor Schedules. [Citation Graph (0, 0)][DBLP ] IPPS, 1996, pp:199-205 [Conf ] Philip Baldwin , Sanjeev Kohli , Edward A. Lee , Xiaojun Liu , Yang Zhao Modeling of sensor nets in Ptolemy II. [Citation Graph (0, 0)][DBLP ] IPSN, 2004, pp:359-368 [Conf ] Jürgen Teich , Lothar Thiele , Edward A. Lee Modeling and simulation of heterogeneous real-time systems based on a deterministic discrete event model. [Citation Graph (0, 0)][DBLP ] ISSS, 1995, pp:156-161 [Conf ] Stephen Neuendorffer , Edward A. Lee Hierarchical reconfiguration of dataflow models. [Citation Graph (0, 0)][DBLP ] MEMOCODE, 2004, pp:179-188 [Conf ] Edward A. Lee , Stephen Neuendorffer Classes and subclasses in actor-oriented design. [Citation Graph (0, 0)][DBLP ] MEMOCODE, 2004, pp:161-168 [Conf ] Ernesto Wandeler , Jörn W. Janneck , Edward A. Lee , Lothar Thiele Counting Interface Automata and their Application in Static Analysis of Actor Models. [Citation Graph (0, 0)][DBLP ] SEFM, 2005, pp:106-116 [Conf ] Elaine Cheong , Edward A. Lee , Yang Zhao Viptos: a graphical development and simulation environment for tinyOS-based wireless sensor networks. [Citation Graph (0, 0)][DBLP ] SenSys, 2005, pp:302- [Conf ] Gilbert C. Sih , Edward A. Lee Dynamic-level scheduling for heterogeneous processor networks. [Citation Graph (0, 0)][DBLP ] SPDP, 1990, pp:42-49 [Conf ] Yuhong Xiong , Edward A. Lee An Extensible Type System for Component-Based Design. [Citation Graph (0, 0)][DBLP ] TACAS, 2000, pp:20-37 [Conf ] Xiaojun Liu , Yuhong Xiong , Edward A. Lee The Ptolemy II Framework for Visual Languages. [Citation Graph (0, 0)][DBLP ] HCC, 2001, pp:50-0 [Conf ] Edward A. Lee Discrete event models: getting the semantics right. [Citation Graph (0, 0)][DBLP ] Winter Simulation Conference, 2006, pp:1- [Conf ] Thomas Huining Feng , Edward A. Lee Incremental checkpointing with application to distributed discrete event simulation. [Citation Graph (0, 0)][DBLP ] Winter Simulation Conference, 2006, pp:1004-1011 [Conf ] Yuhong Xiong , Edward Leet , Xiaojun Liu , Yang Zhao , Lizhi C. Zhong The design and application of structured types in Ptolemy II. [Citation Graph (0, 0)][DBLP ] GrC, 2005, pp:683-688 [Conf ] Edward A. Lee Embedded Software. [Citation Graph (0, 0)][DBLP ] Advances in Computers, 2002, v:56, n:, pp:56-97 [Journal ] Edward A. Lee Modeling Concurrent Real-Time Processes Using Discrete Events. [Citation Graph (0, 0)][DBLP ] Ann. Software Eng., 1999, v:7, n:, pp:25-45 [Journal ] Edward A. Lee Absolutely Positively on Time: What Would It Take? [Citation Graph (0, 0)][DBLP ] IEEE Computer, 2005, v:38, n:7, pp:85-87 [Journal ] Edward A. Lee The Problem with Threads. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 2006, v:39, n:5, pp:33-42 [Journal ] Edward A. Lee What's Ahead for Embedded Software? [Citation Graph (0, 0)][DBLP ] IEEE Computer, 2000, v:33, n:9, pp:18-26 [Journal ] Edward A. Lee , David G. Messerschmitt Engineering and Education for the Future. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 1998, v:31, n:, pp:77-85 [Journal ] Bertram Ludäscher , Ilkay Altintas , Chad Berkley , Dan Higgins , Efrat Jaeger , Matthew Jones , Edward A. Lee , Jing Tao , Yang Zhao Scientific workflow management and the Kepler system. [Citation Graph (0, 0)][DBLP ] Concurrency and Computation: Practice and Experience, 2006, v:18, n:10, pp:1039-1065 [Journal ] Asawaree Kalavade , Edward A. Lee A Hardware-Software Codesign Methodology for DSP Applications. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1993, v:10, n:3, pp:16-28 [Journal ] Edward A. Lee , Yuhong Xiong A behavioral type system and its application in Ptolemy II. [Citation Graph (0, 0)][DBLP ] Formal Asp. Comput., 2004, v:16, n:3, pp:210-237 [Journal ] Shuvra S. Bhattacharyya , Edward A. Lee Looped Schedules for Dataflow Descriptions of Multirate Signal Processing Algorithms. [Citation Graph (0, 0)][DBLP ] Formal Methods in System Design, 1994, v:5, n:3, pp:183-205 [Journal ] Praveen K. Murthy , Shuvra S. Bhattacharyya , Edward A. Lee Joint Minimization of Code and Data for Synchronous Dataflow Programs. [Citation Graph (0, 0)][DBLP ] Formal Methods in System Design, 1997, v:11, n:1, pp:41-70 [Journal ] Joseph Buck , Soonhoi Ha , Edward A. Lee , David G. Messerschmitt Ptolemy: A Framework for Simulating and Prototyping Heterogenous Systems. [Citation Graph (0, 0)][DBLP ] Int. Journal in Computer Simulation, 1994, v:4, n:2, pp:0-0 [Journal ] Edward A. Lee , Stephen Neuendorffer , Michael J. Wirthlin Actor-Oriented Design of Embedded Hardware and Software Systems. [Citation Graph (0, 0)][DBLP ] Journal of Circuits, Systems, and Computers, 2003, v:12, n:3, pp:231-260 [Journal ] Edward A. Lee , Jeffery C. Bier Architectures for Statically Scheduled Dataflow. [Citation Graph (0, 0)][DBLP ] J. Parallel Distrib. Comput., 1990, v:10, n:4, pp:333-348 [Journal ] John R. Barry , Joseph M. Kahn , William J. Krause , Edward A. Lee , David G. Messerschmitt Simulation of Multipath Impulse Response for Indoor Wireless Optical Channels. [Citation Graph (0, 0)][DBLP ] IEEE Journal on Selected Areas in Communications, 1993, v:11, n:3, pp:367-379 [Journal ] Walid A. Najjar , Edward A. Lee , Guang R. Gao Advances in the dataflow computational model. [Citation Graph (0, 0)][DBLP ] Parallel Computing, 1999, v:25, n:13-14, pp:1907-1929 [Journal ] Johan Eker , Jörn W. Janneck , Edward A. Lee , Jie Liu , Xiaojun Liu , J. Ludvig , Stephen Neuendorffer , S. Sachs , Yuhong Xiong Taming heterogeneity - the Ptolemy approach. [Citation Graph (0, 0)][DBLP ] Proceedings of the IEEE, 2003, v:91, n:1, pp:127-144 [Journal ] Stephen A. Edwards , Edward A. Lee The semantics and execution of a synchronous block-diagram language. [Citation Graph (0, 0)][DBLP ] Sci. Comput. Program., 2003, v:48, n:1, pp:21-42 [Journal ] Soonhoi Ha , Edward A. Lee Compile-Time Scheduling and Assignment of Data-Flow Program Graphs with Data-Dependent Iteration. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:11, pp:1225-1238 [Journal ] Alain Girault , Bilung Lee , Edward A. Lee Hierarchical finite state machines with multiple concurrency models. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:6, pp:742-760 [Journal ] Edward A. Lee , Alberto L. Sangiovanni-Vincentelli A framework for comparing models of computation. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:12, pp:1217-1229 [Journal ] John R. Barry , Edward A. Lee , David G. Messerschmitt Capacity penalty due to ideal zero-forcing decision-feedback equalization. [Citation Graph (0, 0)][DBLP ] IEEE Transactions on Information Theory, 1996, v:42, n:4, pp:1062-1071 [Journal ] Jie Liu , Edward A. Lee A component-based approach to modeling and simulating mixed-signal and hybrid systems. [Citation Graph (0, 0)][DBLP ] ACM Trans. Model. Comput. Simul., 2002, v:12, n:4, pp:343-368 [Journal ] Edward A. Lee Consistency in Dataflow Graphs. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1991, v:2, n:2, pp:223-235 [Journal ] Gilbert C. Sih , Edward A. Lee A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1993, v:4, n:2, pp:175-187 [Journal ] Gilbert C. Sih , Edward A. Lee Declustering: A New Multiprocessor Scheduling Technique. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1993, v:4, n:6, pp:625-637 [Journal ] Stephen A. Edwards , Edward A. Lee The Case for the Precision Timed (PRET) Machine. [Citation Graph (0, 0)][DBLP ] DAC, 2007, pp:264-265 [Conf ] Antoon Goderis , Christopher Brooks , Ilkay Altintas , Edward A. Lee , Carole A. Goble Composing Different Models of Computation in Kepler and Ptolemy II. [Citation Graph (0, 0)][DBLP ] International Conference on Computational Science (3), 2007, pp:182-190 [Conf ] Gang Zhou , Man-Kit Leung , Edward A. Lee A Code Generation Framework for Actor-Oriented Models with Partial Evaluation. [Citation Graph (0, 0)][DBLP ] ICESS, 2007, pp:193-206 [Conf ] Predictable programming on a precision timed architecture. [Citation Graph (, )][DBLP ] Toward the Design of Robotic Software with Verifiable Safety. [Citation Graph (, )][DBLP ] CPS foundations. [Citation Graph (, )][DBLP ] Simulation and Implementation of the PTIDES Programming Model. [Citation Graph (, )][DBLP ] An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture. [Citation Graph (, )][DBLP ] Leveraging synchronous language principles for heterogeneous modeling and design of embedded systems. [Citation Graph (, )][DBLP ] On relational interfaces. [Citation Graph (, )][DBLP ] The Case for Timing-Centric Distributed Software Invited Paper. [Citation Graph (, )][DBLP ] Time is a Resource, and Other Stories. [Citation Graph (, )][DBLP ] Cyber Physical Systems: Design Challenges. [Citation Graph (, )][DBLP ] PTIDES on flexible task graph: real-time embedded systembuilding from theory to practice. [Citation Graph (, )][DBLP ] Disciplined Heterogeneous Modeling - Invited Paper. [Citation Graph (, )][DBLP ] Scalable Semantic Annotation Using Lattice-Based Ontologies. [Citation Graph (, )][DBLP ] Real-Time Distributed Discrete-Event Execution with Fault Tolerance. [Citation Graph (, )][DBLP ] A Programming Model for Time-Synchronized Distributed Real-Time Systems. [Citation Graph (, )][DBLP ] Execution Strategies for PTIDES, a Programming Model for Distributed Embedded Systems. [Citation Graph (, )][DBLP ] Computing needs time. [Citation Graph (, )][DBLP ] Search in 0.074secs, Finished in 0.080secs