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Jose Manuel Mendias: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. José Manuel Velasco, David Atienza, Francky Catthoor, Francisco Tirado, Katzalin Olcoz, Jose Manuel Mendias
    Garbage Collector Refinement for New Dynamic Multimedia Applications on Embedded Systems. [Citation Graph (0, 0)][DBLP]
    Interaction between Compilers and Computer Architectures, 2004, pp:25-32 [Conf]
  2. David Atienza, Pablo Garcia Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias
    A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:618-623 [Conf]
  3. Francesco Poletti, Paul Marchal, David Atienza, Luca Benini, Francky Catthoor, Jose Manuel Mendias
    An integrated hardware/software approach for run-time scratchpad management. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:238-243 [Conf]
  4. David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris
    Dynamic Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:532-537 [Conf]
  5. Nicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida, Francky Catthoor
    A Complete Network-On-Chip Emulation Framework. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:246-251 [Conf]
  6. Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias
    Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:874-875 [Conf]
  7. David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris
    Reducing memory accesses with a system-level design methodology in customized dynamic memory management. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2004, pp:93-98 [Conf]
  8. Aitor Ibarra, Juan Lanchares, Jose Manuel Mendias, José Ignacio Hidalgo, Román Hermida
    Transformation of Equational Specification by Means of Genetic Programming. [Citation Graph (0, 0)][DBLP]
    EuroGP, 2002, pp:248-257 [Conf]
  9. Salvatore Carta, Andrea Acquaviva, Pablo Garcia Del Valle, David Atienza, Giovanni De Micheli, Fernando Rincón, Luca Benini, Jose Manuel Mendias
    Multi-processor operating system emulation framework with thermal feedback for systems-on-chip. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:311-316 [Conf]
  10. Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias, Román Hermida
    Performance-driven read-after-write dependencies softening in high-level synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:7-12 [Conf]
  11. David Atienza, Marc Leeman, Francky Catthoor, Geert Deconinck, Jose Manuel Mendias, Vincenzo De Florio, Rudy Lauwereins
    Fast prototyping and refinement of complex dynamic data types in multimedia applications for consumer embedded devices. [Citation Graph (0, 0)][DBLP]
    ICME, 2004, pp:803-806 [Conf]
  12. Nicolas Genko, David Atienza, Giovanni De Micheli, Luca Benini, Jose Manuel Mendias, Román Hermida, Francky Catthoor
    A novel approach for network on chip emulation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2365-2368 [Conf]
  13. J. B. Pérez-Ramas, David Atienza, M. Peón, Ivan Magan, Jose Manuel Mendias, Román Hermida
    Versatile FPGA-Based Functional Validation Framework for Networks-on-Chip Interconnections Designs. [Citation Graph (0, 0)][DBLP]
    PARCO, 2005, pp:769-776 [Conf]
  14. David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris
    Modular Construction and Power Modelling of Dynamic Memory Managers for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:510-520 [Conf]
  15. Marc Leeman, David Atienza, Francky Catthoor, Vincenzo De Florio, Geert Deconinck, Jose Manuel Mendias, Rudy Lauwereins
    Power Estimation Approach of Dynamic Data Storage on a Hardware Software Boundary Level. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:289-298 [Conf]
  16. José Manuel Velasco, David Atienza, Katzalin Olcoz, Francky Catthoor, Francisco Tirado, Jose Manuel Mendias
    Energy Characterization of Garbage Collectors for Dynamic Applications on Embedded Systems. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:69-78 [Conf]
  17. Stylianos Mamagkakis, Alexandros Mpartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias, Antonios Thanailakis
    Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology. [Citation Graph (0, 0)][DBLP]
    WWIC, 2004, pp:26-37 [Conf]
  18. David Atienza, Stylianos Mamagkakis, Francesco Poletti, Jose Manuel Mendias, Francky Catthoor, Luca Benini, Dimitrios Soudris
    Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems. [Citation Graph (0, 0)][DBLP]
    Integration, 2006, v:39, n:2, pp:113-130 [Journal]
  19. María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida
    Bitwise scheduling to balance the computational cost of behavioral specifications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:1, pp:31-46 [Journal]
  20. David Atienza, Jose Manuel Mendias, Stylianos Mamagkakis, Dimitrios Soudris, Francky Catthoor
    Systematic dynamic memory management design methodology for reduced memory footprint. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:2, pp:465-489 [Journal]
  21. María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida
    Area optimization of multi-cycle operators in high-level synthesis. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:449-454 [Conf]
  22. Miguel Peon-Quiros, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris
    Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2007, pp:373-383 [Conf]
  23. Pablo Garcia Del Valle, David Atienza, Ivan Magan, Javier Garcia Flores, Esther Andres Perez, Jose Manuel Mendias, Luca Benini, Giovanni De Micheli
    A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:140-145 [Conf]
  24. David Atienza, Pablo Garcia Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida
    HW-SW emulation framework for temperature-aware design in MPSoCs. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:3, pp:- [Journal]

  25. Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information. [Citation Graph (, )][DBLP]


  26. Using Speculative Functional Units in high level synthesis. [Citation Graph (, )][DBLP]


  27. Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis. [Citation Graph (, )][DBLP]


  28. Applying speculation techniques to implement functional units. [Citation Graph (, )][DBLP]


  29. Subword Switching Activity Minimization to Optimize Dynamic Power Consumption. [Citation Graph (, )][DBLP]


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