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Author:
Manoj Franklin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Aneesh Aggarwal, Manoj Franklin
    Instruction Replication: Reducing Delays Due to Inter-PE Communication Latency. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:46-55 [Conf]
  2. Jayanth Gummaraju, Manoj Franklin
    Branch Prediction in Multi-Threaded Processors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2000, pp:179-188 [Conf]
  3. Renju Thomas, Manoj Franklin
    Using Dataflow Based Context for Accurate Value Prediction. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2001, pp:107-117 [Conf]
  4. Gurindar S. Sohi, Manoj Franklin
    High-Bandwidth Data Memory Systems for Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:53-62 [Conf]
  5. Narayan Ranganathan, Manoj Franklin
    An Empirical Study of Decentralized ILP Execution Models. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1998, pp:272-281 [Conf]
  6. Manoj Franklin
    Fast computation of C-MISR signatures. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1995, pp:293-297 [Conf]
  7. Mohamed M. Zahran, Manoj Franklin
    RHT: A Context-Based Return Address Predictor. [Citation Graph (0, 0)][DBLP]
    CDES, 2006, pp:17-23 [Conf]
  8. Joonhyuk Yoo, Manoj Franklin
    The Filter Checker: An Active Verification Management Approach. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:516-524 [Conf]
  9. Krishnan Kailas, Manoj Franklin, Kemal Ebcioglu
    A Register File Architecture and Compilation Scheme for Clustered ILP Processors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2002, pp:500-511 [Conf]
  10. Manoj Franklin, Kewal K. Saluja
    Pattern Sensitive Fault Testing of RAMs with Bullt-in ECC. [Citation Graph (0, 0)][DBLP]
    FTCS, 1991, pp:385-392 [Conf]
  11. Aneesh Aggarwal, Manoj Franklin
    Putting Data Value Predictors to Work in Fine-Grain Parallel Processors. [Citation Graph (0, 0)][DBLP]
    HiPC, 2001, pp:204-213 [Conf]
  12. Anasua Bhowmik, Manoj Franklin
    Exploiting Data Value Prediction in Compiler Based Thread Formation. [Citation Graph (0, 0)][DBLP]
    HiPC, 2002, pp:506-518 [Conf]
  13. Wamsi Mohan, Manoj Franklin
    Improving Data Value Prediction Accuracy Using Path Correlation. [Citation Graph (0, 0)][DBLP]
    HiPC, 1999, pp:28-32 [Conf]
  14. Renju Thomas, Manoj Franklin
    Using Dataflow Based Contextfor Accurate Branch Prediction. [Citation Graph (0, 0)][DBLP]
    HiPC, 2002, pp:587-596 [Conf]
  15. Sreenivas Vadlapatla, Manoj Franklin
    Performance Benefits of Exploiting Control Independence. [Citation Graph (0, 0)][DBLP]
    HiPC, 1999, pp:33-37 [Conf]
  16. Mohamed M. Zahran, Manoj Franklin
    Return-Address Prediction in Speculative Multithreaded Environments. [Citation Graph (0, 0)][DBLP]
    HiPC, 2002, pp:609-619 [Conf]
  17. Michael Black, Manoj Franklin
    Neural Confidence Estimation for More Accurate Value Prediction. [Citation Graph (0, 0)][DBLP]
    HiPC, 2005, pp:376-385 [Conf]
  18. Aneesh Aggarwal, Manoj Franklin
    Energy Efficient Asymmetrically Ported Register Files. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:2-7 [Conf]
  19. Aneesh Aggarwal, Manoj Franklin, Oguz Ergin
    Defining Wakeup Width for Efficient Dynamic Scheduling. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:36-41 [Conf]
  20. Mohamed M. Zahran, Manoj Franklin
    Dynamic Thread Resizing for Speculative Multithreaded Processors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:313-0 [Conf]
  21. Manoj Franklin
    Incorporating Fault Tolerance in the Multiscalar Fine-Grain Parallel Processor. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1995, pp:110-117 [Conf]
  22. Gregory A. Kemp, Manoj Franklin
    PEWs: A Decentralized Dynamic Scheduler for ILP Processing. [Citation Graph (0, 0)][DBLP]
    ICPP, Vol. 1, 1996, pp:239-246 [Conf]
  23. Krishna K. Sundararaman, Manoj Franklin
    Multiscalar Execution along a Single Flow of Control. [Citation Graph (0, 0)][DBLP]
    ICPP, 1997, pp:106-113 [Conf]
  24. Anasua Bhowmik, Manoj Franklin
    A fast approximate interprocedural analysis for speculative multithreading compilers. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:32-41 [Conf]
  25. Aneesh Aggarwal, Manoj Franklin
    Hierarchical Interconnects for On-Chip Clustering. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  26. Kun Luo, Manoj Franklin, Shubhendu S. Mukherjee, André Seznec
    Boosting SMT Performance by Speculation Control. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2001, pp:2- [Conf]
  27. Mohamed M. Zahran, Manoj Franklin
    A Feasibility Study of Hierarchical Multithreading. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  28. Manoj Franklin, Gurindar S. Sohi
    The Expandable Split Window Paradigm for Exploiting Fine-Grain Parallelism. [Citation Graph (0, 0)][DBLP]
    ISCA, 1992, pp:58-67 [Conf]
  29. Renju Thomas, Manoj Franklin, Chris Wilkerson, Jared Stark
    Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History. [Citation Graph (0, 0)][DBLP]
    ISCA, 2003, pp:314-323 [Conf]
  30. Manoj Franklin, Kewal K. Saluja
    An Algorithm to Test Rams for Physical Neighborhood Pattern Sensitive Faults. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:675-684 [Conf]
  31. Manoj Franklin, Kewal K. Saluja, Kozo Kinoshita
    Design of a BIST RAM with Row/Column Pattern Sensitive Fault Detection Capability. [Citation Graph (0, 0)][DBLP]
    ITC, 1989, pp:327-336 [Conf]
  32. Simonjit Dutta, Manoj Franklin
    Control flow prediction with tree-like subgraphs for superscalar processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1995, pp:258-263 [Conf]
  33. Manoj Franklin, Gurindar S. Sohi
    Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1992, pp:236-245 [Conf]
  34. Manoj Franklin, Mark Smotherman
    A fill-unit approach to multiple instruction issue. [Citation Graph (0, 0)][DBLP]
    MICRO, 1994, pp:162-171 [Conf]
  35. Dionisios N. Pnevmatikatos, Manoj Franklin, Gurindar S. Sohi
    Control flow prediction for dynamic ILP processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1993, pp:153-163 [Conf]
  36. Mark Smotherman, Manoj Franklin
    Improving CISC instruction decoding performance using a fill unit. [Citation Graph (0, 0)][DBLP]
    MICRO, 1995, pp:219-229 [Conf]
  37. Kai Wang, Manoj Franklin
    Highly Accurate Data Value Prediction Using Hybrid Predictors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1997, pp:281-290 [Conf]
  38. Anasua Bhowmik, Manoj Franklin
    A general compiler framework for speculative multithreading. [Citation Graph (0, 0)][DBLP]
    SPAA, 2002, pp:99-108 [Conf]
  39. Manoj Franklin, Kewal K. Saluja
    An Algorithm to Test Reconfigured RAMs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:359-364 [Conf]
  40. Manoj Franklin, Kewal K. Saluja, Kyuchull Kim
    Fast computation of MISR signatures. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1995, pp:414-418 [Conf]
  41. Manoj Franklin, Kewal K. Saluja
    Built-in Self-testing of Random-Access Memories. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1990, v:23, n:10, pp:45-56 [Journal]
  42. Aneesh Aggarwal, Manoj Franklin
    Instruction Replication for Reducing Delays Due to Inter-PE Communication Latency. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:12, pp:1496-1507 [Journal]
  43. Manoj Franklin, Kewal K. Saluja
    Hypergraph Coloring and Reconfigured RAM Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:6, pp:725-736 [Journal]
  44. Manoj Franklin, Gurindar S. Sohi
    ARB: A Hardware Mechanism for Dynamic Reordering of Memory References. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:552-571 [Journal]
  45. Manoj Franklin, Kewal K. Saluja
    Testing reconfigured RAM's and scrambled address RAM's for pattern sensitive faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:9, pp:1081-1087 [Journal]
  46. Aneesh Aggarwal, Manoj Franklin
    Scalability Aspects of Instruction Distribution Algorithms for Clustered Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:10, pp:944-955 [Journal]
  47. Anasua Bhowmik, Manoj Franklin
    A General Compiler Framework for Speculative Multithreaded Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:8, pp:713-724 [Journal]
  48. Simonjit Dutta, Manoj Franklin
    Control Flow Prediction Schemes for Wide-Issue Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1999, v:10, n:4, pp:346-359 [Journal]

  49. Prioritizing verification via value-based correctness criticality. [Citation Graph (, )][DBLP]


  50. Perceptron Based Consumer Prediction in Shared-Memory Multiprocessors. [Citation Graph (, )][DBLP]


  51. HMMer-Cell: High Performance Protein Profile Searching on the Cell/B.E. Processor. [Citation Graph (, )][DBLP]


  52. BioBench: A Benchmark Suite of Bioinformatics Applications. [Citation Graph (, )][DBLP]


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