Search the dblp DataBase
Kanad Ghose :
[Publications ]
[Author Rank by year ]
[Co-authors ]
[Prefers ]
[Cites ]
[Cited by ]
Publications of Author
Deniz Balkan , Joseph J. Sharkey , Dmitry Ponomarev , Kanad Ghose SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. [Citation Graph (0, 0)][DBLP ] PACT, 2006, pp:265-274 [Conf ] Dmitry Ponomarev , Gurhan Kucuk , Oguz Ergin , Kanad Ghose Reducing Datapath Energy through the Isolation of Short-Lived Operands. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2003, pp:258-268 [Conf ] Dmitry Ponomarev , Gurhan Kucuk , Kanad Ghose AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors. [Citation Graph (0, 0)][DBLP ] DATE, 2002, pp:124-131 [Conf ] Alisa Neeman , Peter Sulatycke , Kanad Ghose Fast Remote Isosurface Visualization With Chessboarding. [Citation Graph (0, 0)][DBLP ] EGPGV, 2004, pp:75-82 [Conf ] Kanad Ghose , Kiran Raghavendra Desai , Peter M. Kogge Using Method Lookup Caches and Register Windowing to Speed Up Dynamically-Bound Object-Oriented Applications. [Citation Graph (0, 0)][DBLP ] EUROMICRO, 1996, pp:441-0 [Conf ] Kanad Ghose , Pavel Vasek A Fast Capability Extension to a RISC Architecture. [Citation Graph (0, 0)][DBLP ] EUROMICRO, 1996, pp:606-0 [Conf ] Kanad Ghose , Sudhir Aggarwal , Abhrajit Ghosh , David Goldman , Peter Sulatycke , Pavel Vasek , David R. Vogel Designing Multiprocessor/Distributed Real-Time Systems Using the ASSERTS Toolkit. [Citation Graph (0, 0)][DBLP ] Euro-Par, 1999, pp:505-510 [Conf ] Dmitry Ponomarev , Kanad Ghose , Eugeny Saksonov Optimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2001, pp:86-95 [Conf ] Stephen Shafer , Kanad Ghose Post-Scheduling Optimization of Parallel Programs. [Citation Graph (0, 0)][DBLP ] Euro-Par, 1999, pp:440-444 [Conf ] Nitin K. Singhvi , Kanad Ghose A Formal Study of the Mcube Interconnection Network. [Citation Graph (0, 0)][DBLP ] Euro-Par, 1995, pp:579-591 [Conf ] Zhihui Zhang , Kanad Ghose yFS: A Journaling File System Design for Handling Large Data Sets with Reduced Seeking. [Citation Graph (0, 0)][DBLP ] FAST, 2003, pp:- [Conf ] Joseph J. Sharkey , Nayef Abu-Ghazeleh , Dmitry V. Ponomarev , Kanad Ghose , Aneesh Aggarwal Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors. [Citation Graph (0, 0)][DBLP ] HiPC, 2006, pp:135-147 [Conf ] Oguz Ergin , Deniz Balkan , Dmitry V. Ponomarev , Kanad Ghose Increasing Processor Performance Through Early Register Release. [Citation Graph (0, 0)][DBLP ] ICCD, 2004, pp:480-487 [Conf ] Oguz Ergin , Kanad Ghose , Gurhan Kucuk , Dmitry Ponomarev A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors. [Citation Graph (0, 0)][DBLP ] ICCD, 2002, pp:118-121 [Conf ] Gurhan Kucuk , Oguz Ergin , Dmitry Ponomarev , Kanad Ghose Distributed Reorder Buffer Schemes for Low Power. [Citation Graph (0, 0)][DBLP ] ICCD, 2003, pp:364-370 [Conf ] Joseph J. Sharkey , Kanad Ghose , Dmitry V. Ponomarev , Oguz Ergin Power-Efficient Wakeup Tag Broadcast. [Citation Graph (0, 0)][DBLP ] ICCD, 2005, pp:654-661 [Conf ] Onur Demir , Kanad Ghose Real-Time Protection against DDoS Attacks Using Active Gateways. [Citation Graph (0, 0)][DBLP ] ICDCS Workshops, 2005, pp:224-231 [Conf ] Kanad Ghose , Der-Chung Cheng Efficient Synchronization Schemes for Large-Scale Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1991, pp:153-160 [Conf ] Kanad Ghose , Kiran Raghavendra Desai The Design and Evaluation of the Hierarchical Cubic Network. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1990, pp:355-362 [Conf ] Kanad Ghose , R. Kym Horsell , Nitin K. Singhvi Hybrid Multiprocessing in OPTIMUL : A Multiprocessor for Distributed and Shared Memory Multiprocessing with WDM Optical Fiber Interconnections. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1994, pp:196-199 [Conf ] Kanad Ghose , Seth Melnick , Tom Gaska , Seth Goldberg , Arun K. Jayendran , Brian T. Stein The Implementation of Low Latency Communication Primitives in the Snow Prototype. [Citation Graph (0, 0)][DBLP ] ICPP, 1997, pp:462-461 [Conf ] Kanad Ghose , Sreenivas Simhadri A Cache Coherency Mechanism with Limited Combining Capabilities for MIN-Based Multiprocessors. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1991, pp:296-300 [Conf ] Neelima Mehdiratta , Kanad Ghose A Bottom-Up Approach to Task Scheduling in Distributed Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] ICPP, 1994, pp:151-154 [Conf ] Stephen Shafer , Kanad Ghose Static Message Combining in Task Graph Schedules. [Citation Graph (0, 0)][DBLP ] ICPP (2), 1995, pp:50-54 [Conf ] Peter Sulatycke , Kanad Ghose Multithreaded Isosurface Rendering on SMPs Using Span-Space Buckets. [Citation Graph (0, 0)][DBLP ] ICPP, 2002, pp:572-0 [Conf ] Kiran Raghavendra Desai , Kanad Ghose A Comparative Study of Single Hop WDM Interconnections for Multiprocessors. [Citation Graph (0, 0)][DBLP ] International Conference on Supercomputing, 1995, pp:154-163 [Conf ] Gurhan Kucuk , Dmitry Ponomarev , Kanad Ghose Low-complexity reorder buffer architecture. [Citation Graph (0, 0)][DBLP ] ICS, 2002, pp:57-66 [Conf ] Nitin K. Singhvi , Kanad Ghose The Mcube: a symmetrical cube based network with twisted links. [Citation Graph (0, 0)][DBLP ] IPPS, 1995, pp:11-16 [Conf ] Stephen Shafer , Kanad Ghose Improving Parallel Program Execution Time with Message Consolidation. [Citation Graph (0, 0)][DBLP ] IPPS, 1994, pp:736-742 [Conf ] Peter Sulatycke , Kanad Ghose Caching-Efficient Multithreaded Fast Multiplication of Sparse Matrices. [Citation Graph (0, 0)][DBLP ] IPPS/SPDP, 1998, pp:117-123 [Conf ] Peter Sulatycke , Kanad Ghose A Fast Multithreaded Out-of-Core Visualization Technique. [Citation Graph (0, 0)][DBLP ] IPPS/SPDP, 1999, pp:569-575 [Conf ] Kanad Ghose Reducing energy requirements for instruction issue and dispatch in superscalar microprocessors (poster session). [Citation Graph (0, 0)][DBLP ] ISLPED, 2000, pp:231-233 [Conf ] Kanad Ghose , Milind B. Kamble Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation. [Citation Graph (0, 0)][DBLP ] ISLPED, 1999, pp:70-75 [Conf ] Milind B. Kamble , Kanad Ghose Analytical energy dissipation models for low-power caches. [Citation Graph (0, 0)][DBLP ] ISLPED, 1997, pp:143-148 [Conf ] Gurhan Kucuk , Kanad Ghose , Dmitry Ponomarev , Peter M. Kogge Energy: efficient instruction dispatch buffer design for superscalar processors. [Citation Graph (0, 0)][DBLP ] ISLPED, 2001, pp:237-242 [Conf ] Gurhan Kucuk , Dmitry Ponomarev , Oguz Ergin , Kanad Ghose Reducing reorder buffer complexity through selective operand caching. [Citation Graph (0, 0)][DBLP ] ISLPED, 2003, pp:235-240 [Conf ] Dmitry Ponomarev , Gurhan Kucuk , Oguz Ergin , Kanad Ghose Power efficient comparators for long arguments in superscalar processors. [Citation Graph (0, 0)][DBLP ] ISLPED, 2003, pp:378-383 [Conf ] Joseph J. Sharkey , Dmitry V. Ponomarev , Kanad Ghose , Oguz Ergin Instruction packing: reducing power and delay of the dynamic scheduling logic. [Citation Graph (0, 0)][DBLP ] ISLPED, 2005, pp:30-35 [Conf ] Deniz Balkan , Joseph J. Sharkey , Dmitry Ponomarev , Kanad Ghose Selective writeback: exploiting transient values for energy-efficiency and performance. [Citation Graph (0, 0)][DBLP ] ISLPED, 2006, pp:37-42 [Conf ] Hui Zeng , Kanad Ghose Register file caching for energy efficiency. [Citation Graph (0, 0)][DBLP ] ISLPED, 2006, pp:244-249 [Conf ] Oguz Ergin , Deniz Balkan , Kanad Ghose , Dmitry V. Ponomarev Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure. [Citation Graph (0, 0)][DBLP ] MICRO, 2004, pp:304-315 [Conf ] Dmitry Ponomarev , Gurhan Kucuk , Kanad Ghose Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources. [Citation Graph (0, 0)][DBLP ] MICRO, 2001, pp:90-101 [Conf ] Matt T. Yourst , Kanad Ghose Incremental Commit Groups for Non-Atomic Trace Processing. [Citation Graph (0, 0)][DBLP ] MICRO, 2005, pp:67-80 [Conf ] Onur Demir , Kanad Ghose Improving Transaction Server Performance under Heavy Loads with Differentiated Service and Active Network Interfaces. [Citation Graph (0, 0)][DBLP ] NCA, 2005, pp:251-254 [Conf ] Joseph J. Sharkey , Dmitry Ponomarev , Kanad Ghose , Oguz Ergin Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. [Citation Graph (0, 0)][DBLP ] PACS, 2004, pp:15-29 [Conf ] Kanad Ghose OPTIMUL: A Hybrid Multiprocessor for Distributed and Shared Memory Multiprocessing with WDM Optical Fiber Interconnections. [Citation Graph (0, 0)][DBLP ] PARLE, 1994, pp:238-249 [Conf ] Neelima Mehdiratta , Kanad Ghose Scheduling Task Graphs Onto Distributed Memory Multiprocessors Under Realistic Constaints. [Citation Graph (0, 0)][DBLP ] PARLE, 1994, pp:589-600 [Conf ] Shadi T. Khasawneh , Kanad Ghose An Adaptive Technique for Reducing Leakage and Dynamic Power in Register Files and Reorder Buffers. [Citation Graph (0, 0)][DBLP ] PATMOS, 2005, pp:498-507 [Conf ] Gurhan Kucuk , Oguz Ergin , Dmitry Ponomarev , Kanad Ghose Energy Efficient Register Renaming. [Citation Graph (0, 0)][DBLP ] PATMOS, 2003, pp:219-228 [Conf ] Dmitry Ponomarev , Gurhan Kucuk , Kanad Ghose Energy-Efficient Design of the Reorder Buffer. [Citation Graph (0, 0)][DBLP ] PATMOS, 2002, pp:289-299 [Conf ] James W. Ryder , Kanad Ghose Multi-Sensory Browser and Editor Model. [Citation Graph (0, 0)][DBLP ] SAC, 1999, pp:443-449 [Conf ] Kanad Ghose , V. Anand Dharmaraj Response Pipelined CAM Chips: The First Generation and Beyond. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1994, pp:365-368 [Conf ] Milind B. Kamble , Kanad Ghose Energy-Efficiency of VLSI Caches: A Comparative Study. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1997, pp:261-267 [Conf ] Joseph J. Sharkey , Dmitry V. Ponomarev , Kanad Ghose , Oguz Ergin Instruction packing: Toward fast and energy-efficient instruction scheduling. [Citation Graph (0, 0)][DBLP ] TACO, 2006, v:3, n:2, pp:156-181 [Journal ] Oguz Ergin , Deniz Balkan , Dmitry Ponomarev , Kanad Ghose Early Register Deallocation Mechanisms Using Checkpointed Register Files. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2006, v:55, n:9, pp:1153-1166 [Journal ] Gurhan Kucuk , Dmitry Ponomarev , Oguz Ergin , Kanad Ghose Complexity-Effective Reorder Buffer Designs for Superscalar Processors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2004, v:53, n:6, pp:653-665 [Journal ] Dmitry V. Ponomarev , Gurhan Kucuk , Oguz Ergin , Kanad Ghose Isolating Short-Lived Operands for Energy Reduction. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2004, v:53, n:6, pp:697-709 [Journal ] Dmitry V. Ponomarev , Gurhan Kucuk , Oguz Ergin , Kanad Ghose Energy Efficient Comparators for Superscalar Datapaths. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2004, v:53, n:7, pp:892-904 [Journal ] Dmitry V. Ponomarev , Gurhan Kucuk , Kanad Ghose Dynamic Resizing of Superscalar Datapath Components for Energy Efficiency. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2006, v:55, n:2, pp:199-213 [Journal ] Kanad Ghose , Kiran Raghavendra Desai Hierarchical Cubic Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1995, v:6, n:4, pp:427-435 [Journal ] Onur Demir , Michael R. Head , Kanad Ghose , Madhusudhan Govindaraju Protecting grid data transfer services with active network interfaces. [Citation Graph (0, 0)][DBLP ] GRID, 2005, pp:9-16 [Conf ] Onur Demir , Michael R. Head , Kanad Ghose , Madhusudhan Govindaraju Securing Grid Data Transfer Services with Active Network Portals. [Citation Graph (0, 0)][DBLP ] IPDPS, 2007, pp:1-8 [Conf ] Kiran Raghavendra Desai , Kanad Ghose Generalized cubic networks. [Citation Graph (0, 0)][DBLP ] PDP, 1997, pp:116-126 [Conf ] Kanad Ghose , Arun K. Jayendran , Brian T. Stein Protected, low-latency message passing in the SNOW prototype. [Citation Graph (0, 0)][DBLP ] PDP, 1997, pp:314-321 [Conf ] Zhihui Zhang , Kanad Ghose hFS: a hybrid file system prototype for improving small file and metadata performance. [Citation Graph (0, 0)][DBLP ] EuroSys, 2007, pp:175-187 [Conf ] Dmitry V. Ponomarev , Gurhan Kucuk , Oguz Ergin , Kanad Ghose , Peter M. Kogge Energy-efficient issue queue design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2003, v:11, n:5, pp:789-800 [Journal ] DARE: A Framework for Dynamic Authentication of Remote Executions. [Citation Graph (, )][DBLP ] MPTLsim: a simulator for X86 multicore processors. [Citation Graph (, )][DBLP ] Detecting and Tracking Spatio-temporal Clusters with Adaptive History Filtering. [Citation Graph (, )][DBLP ] Register Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures. [Citation Graph (, )][DBLP ] Accurately clustering moving objects with adaptive history filtering. [Citation Graph (, )][DBLP ] Energy-efficient MESI cache coherence with pro-active snoop filtering for multicore microprocessors. [Citation Graph (, )][DBLP ] An energy-efficient checkpointing mechanism for out of order commit processor. [Citation Graph (, )][DBLP ] Energy-efficient renaming with register versioning. [Citation Graph (, )][DBLP ] Efficiently detecting clusters of mobile objects in the presence of dense noise. [Citation Graph (, )][DBLP ] A high performance barrier synchronizer and its novel applications in highly parallel systems. [Citation Graph (, )][DBLP ] Search in 0.017secs, Finished in 0.021secs